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Thread: Towards fine-grained precision reconfiguration in variable-precision neural network accelerator 期刊论文
IEICE ELECTRONICS EXPRESS, 2019, 卷号: 16, 期号: 14, 页码: 6
作者:  Zhang, Shichang;  Wang, Ying;  Chen, Xiaoming;  Han, Yinhe;  Wang, Yujie
收藏  |  浏览/下载：93/0  |  提交时间：2019/12/10
XLCS: A new bit-parallel longest common subsequence algorithm on xeon phi clusters 期刊论文
Proceedings - 21st IEEE International Conference on High Performance Computing and Communications, 17th IEEE International Conference on Smart City and 5th IEEE International Conference on Data Science and Systems, HPCC/SmartCity/DSS 2019, 2019, 页码: 1477-1483
作者:  Yin, Zekun;  Zhang, Hao;  Xu, Kai;  Chan, Yuandong;  Peng, Shaoliang
收藏  |  浏览/下载：9/0  |  提交时间：2019/12/11
Research on Parallel Rate Control Based on BP Neural Network 会议论文
2018 INTERNATIONAL CONFERENCE ON AUDIO, LANGUAGE AND IMAGE PROCESSING (ICALIP), 2018-01-01
作者:  Li, Guoping[1];  Huang, Lulu[2];  Wang, Guozhong[3];  Yao, Chen[4]
收藏  |  浏览/下载：13/0  |  提交时间：2019/04/22
A Low Complexity Precoding Algorithm Based on Parallel Conjugate Gradient for Massive MIMO Systems 期刊论文
IEEE ACCESS, 2018, 卷号: 6, 页码: 54010-54017
作者:  Chen, Geng;  Zeng, Qingtian;  Xue, Xiaomei;  Li, Zhengquan
收藏  |  浏览/下载：3/0  |  提交时间：2019/12/11
Soft forwarding technique for unitary space-time modulation 期刊论文
IET communications, 2013, 卷号: 7, 期号: 16, 页码: 1810-1817
作者:  Qianqian Liu;  Yewen Cao
收藏  |  浏览/下载：3/0  |  提交时间：2019/12/23
Simplified MMSE Detectors for Turbo Receiver in BICM MIMO Systems 期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2013, 卷号: 28, 页码: 445-453
作者:  Han, Juan;  Tang, Chao;  Wang, Qiu-Ju;  Zhu, Zi-Yuan;  Tang, Shan
收藏  |  浏览/下载：3/0  |  提交时间：2020/01/06
Communication synchronization in wireless optical link (EI CONFERENCE) 会议论文
2012 International Conference on Control Engineering and Communication Technology, ICCECT 2012, December 7, 2012 - December 9, 2012, Shenyang, Liaoning, China
Wang H.; Guo J.; Wang T.
收藏  |  浏览/下载：23/0  |  提交时间：2013/03/25
An FPGA based transceiving synchronization method is demonstrated for Free Space Optical (FSO) communication system  which is discussed separately as the transmitting protocol and the receiving protocol. During the discussion of these two parts  the co-operation of them is also discussed. The transmitting protocol interfaces the outer input data with a parallel port  buffers the input data  encodes the input data stream  serializes the parallel data and outputs the serialized data. It also has an output management unit to manage the activity of each part of the transmitting protocol. The receiving protocol filters and synchronizes the input serial data stream  parallels the serial data stream  decodes the input data  checks received error  handles transmission exception and interfaces the outer receiver with a parallel port. The entire transceiving protocol could be programmed into a single FPGA chip to improve system integrity and reduce the system cost. The presented protocol could be taken as "protocol transparent" for outer interfaces  meaning that when interfacing the presented system to an outer system  users don't have to consider what protocol the outer system transceiving data stream is under  for example  the TCP/IP protocol or anything else  in the case that its I/O interface is a parallel port. Simulation and final experiment prove that the protocol presented is a working solution at a certain bit rate scale. 2012 IEEE.  
Design of high speed and parallel compression system used in the big area CCD of high frame frequency (EI CONFERENCE) 会议论文
2011 International Conference on Precision Engineering and Non-Traditional Machining, PENTM 2011, December 9, 2011 - December 11, 2011, Xi'an, China
Liu Y.-Y.; Gao Y.-H.; Li G.-N.; Wang W.-H.; Zhang R.-F.; Jin L.-X.
收藏  |  浏览/下载：50/0  |  提交时间：2013/03/25
According to the area CCD camera of characteristics  such as high resolution capacity and high frame frequency  this paper puts forward a high speed and parallel image compression system of high integration degree. Firstly  according to the work principle of the area CCD  FPGA is adopted to realize the timing driving and multichannel and parallel analog signal handling to raise the export frame frequency of the area CCD. Secondly  with an image compression scheme based on FPGA embedded processor MicroBlaze and ADV212 compression chip  real time image compression and the high speed area CCD are realized. Finally  by detecting the analog signal of the area CCD output  the real time compression of the big area CCD image is carried out in different compression ratios and the compression performance is analyzed. Experiment result shows that this scheme can realize real time image compression with the biggest data rate of 520Mbps. When compression bit ratio is 0.15  the signal-to-noise ratio of peak value can reach 36 dB. Image collection and image compression are integrated  which reduces the data transmission between them and improves systematic integration degree.  
A small thickness measurement system based on PSD and FPGA (EI CONFERENCE) 会议论文
3rd International Conference on Measuring Technology and Mechatronics Automation, ICMTMA 2011, January 6, 2011 - January 7, 2011, Shanghai, China
Guo J.; He X.; Wei Z.; Wu Y.
收藏  |  浏览/下载：22/0  |  提交时间：2013/03/25
Considering that the requirement of industrial manufacture  An AT89S51 singlechip works as the core processor of the system. By two laser triangulation  a small thickness measurement system based on PSD and FPGA is presented. It takes S3931 PSD of one dimension as position detection device  A FPGA produces logic control signals for the whole system  the small displacement is converted to differential voltages  which is made by Hamamatsu in Japan  and after amplification and A/D transformation  8-bit parallel data is send to singlechip from FPGA by external interrupts  and the final calculation results output to the LCD display module. After digital micro meter calibration  we get the small thickness. Experiments show that the detection accuracy of the system is not less than 10um.  
A novel Rename Register architecture and performance analysis 会议论文
Advances in Computer Systems Architecture. 9th Asia-Pacific Conference, ACSAC 2004. Proceedings (Lecture Notes in Comput. Sci. Vol.3189), Advances in Computer Systems Architecture. 9th Asia-Pacific Conference, ACSAC 2004. Proceedings, Beijing, China, INSPEC
Zhenyu Liu; Jiayue Qi
收藏  |  浏览/下载：1/0

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