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浏览/检索结果:
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TA-denseNet: Efficient hardware trust and assurance model based on feature extraction and comparison of SEM images and GDSII images
期刊论文
INTEGRATION-THE VLSI JOURNAL, 2024, 卷号: 95, 页码: 9
作者:
Xiao, Wei
;
Zhao, Fazhan
;
Zhao, Kun
;
Ma, Hongtu
;
Li, Qing
收藏
  |  
浏览/下载:8/0
  |  
提交时间:2024/02/20
Scanning electron microscopy
Deep learning
Hardware trust and assurance
Integrated circuit
FireFly: A High-Throughput Hardware Accelerator for Spiking Neural Networks With Efficient DSP and Memory Optimization
期刊论文
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, 页码: 1178 - 1191
作者:
Li, Jindong
;
Shen, Guobin
;
Zhao, Dongcheng
;
Zhang, Qian
;
Zeng, Yi
收藏
  |  
浏览/下载:1/0
  |  
提交时间:2024/06/05
Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2021, 卷号: 29, 期号: 3, 页码: 472-484
作者:
Xu, Dawen
;
Zhu, Ziyang
;
Liu, Cheng
;
Wang, Ying
;
Zhao, Shuang
收藏
  |  
浏览/下载:14/0
  |  
提交时间:2021/12/01
Neural networks
Circuit faults
Hardware
Acceleration
Reliability
Analytical models
Computational modeling
Integrated circuit reliability
reliability
An Adaptive Thermal-Aware ECC Scheme for Reliable STT-MRAM LLC Design
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2019, 卷号: 27, 期号: 8, 页码: 1851-1860
作者:
Wu, Bi
;
Zhang, Beibei
;
Cheng, Yuanqing
;
Wang, Ying
;
Liu, Dijun
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  |  
浏览/下载:73/0
  |  
提交时间:2019/12/10
Error correction code (ECC)
last level cache (LLC)
reliability
spin-transfer-torque magnetoresistive random-access memory (STT-MRAM)
temperature
A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition
期刊论文
INTEGRATION-THE VLSI JOURNAL, 2019, 卷号: 66, 页码: 164-172
作者:
Wei, Xing
;
Yu, Le
;
Yin, Tao
;
Huang, Zhihong
;
Li, Wei
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  |  
浏览/下载:65/0
  |  
提交时间:2019/08/16
Floating-point
Fast fourier transform (FFT)
Mixed-radix
Multi-path delay feedback (MDF)
Binary-tree decomposition
Twiddle factor
Fused FP arithmetic unit
Mixed-Signal Overclocked I/O Buffers Model Abstraction for Signal Integrity Assessment
期刊论文
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019, 卷号: 27, 页码: 691-699
作者:
Dghais, Wael
;
Souilem, Malek
;
Alam, Muhammad
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  |  
浏览/下载:12/0
  |  
提交时间:2019/11/19
Behavioral model
Biological system modeling
Buffer information
Event-driven
High-level abstraction
Hybrid automatons
Integrated circuit modeling
Overclocking
Predictive models
Signal Integrity
Timing
Transient simulation
PUFPass: A password management mechanism based on software/hardware codesign
期刊论文
INTEGRATION-THE VLSI JOURNAL, 2019, 卷号: 64, 页码: 173-183
作者:
Lan, Yazhu
;
Li, Bing
;
Hu, Yu
;
Li, Xiaowei
;
Zhang, Guohe
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  |  
浏览/下载:36/0
  |  
提交时间:2019/04/03
Password
Password management mechanism
PUF
Security
Usability
Ferroelectric FETs-Based Nonvolatile Logic-in-Memory Circuits
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2019, 卷号: 27, 期号: 1, 页码: 159-172
作者:
Chen, Xiaoming
;
Niemier, Michael
;
Hu, Xiaobo Sharon
;
Yin, Xunzhao
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  |  
浏览/下载:73/0
  |  
提交时间:2019/04/03
Ferroelectric FET (FeFET)
logic-in-memory (LiM)
nonvolatile (NV) memory
Radiation-Hardened 14T SRAM Bitcell With Speed and Power Optimized for Space Application
期刊论文
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019, 卷号: Vol.27 No.2, 页码: 407-415
作者:
Changyong Liu
;
Xiulong Wu
;
Zhiting Lin
;
Junning Chen
;
Jiati Huang
收藏
  |  
浏览/下载:17/0
  |  
提交时间:2019/04/24
A pre-silicon logic level security verification flow for higher-order masking schemes against glitches on FPGAs
期刊论文
Integration, 2019
作者:
Li, Yanbin
;
Tang, Ming
;
Li, Yuguang
;
Zhang, Huanguo
收藏
  |  
浏览/下载:8/0
  |  
提交时间:2019/12/05
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