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The neural network model to solve the pre-consolidation stress
会议论文
Guangzhou, PEOPLES R CHINA, JUN 24-25, 2017
作者:
An, Ran
;
Kong, Ling-wei
;
Li, Cheng-sheng
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浏览/下载:36/0
  |  
提交时间:2018/06/05
pre-consolidation stress
BP artificial neural network
e-p curves
MATLAB
联合收割机谷物流量检测装置
专利
专利类型: 实用新型, 专利号: CN205408586U, 申请日期: 2016-08-03, 公开日期: 2016-08-03
作者:
胡静涛
;
王鹤
;
高雷
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  |  
浏览/下载:111/0
  |  
提交时间:2016/09/07
高精度在线动态连续可调输出电源
专利
专利类型: 实用新型, 专利号: CN205229873U, 申请日期: 2016-05-11, 公开日期: 2016-05-11
作者:
刘晓源
;
杨帆
;
曹云侠
;
罗勇
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  |  
浏览/下载:18/0
  |  
提交时间:2016/09/07
内需对我国真实出口规模的影响分析—基于增加值贸易核算方法
学位论文
2015, 2015
孙欣
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浏览/下载:2/0
  |  
提交时间:2016/02/23
增加值贸易核算
真实出口规模
本地市场效应
Trade in value-added
Real export value
Home Market Effect
Study on the fault ride-through capacity of doubly fed induction generator
期刊论文
Huazhong Keji Daxue Xuebao (Ziran Kexue Ban)/Journal of Huazhong University of Science and Technology (Natural Science Edition), 2014, 卷号: 42, 期号: 2, 页码: 35-39
作者:
Zhang, Xiaoying
;
Cheng, Zhizhuang
;
Dang, Cunlu
;
Wang, Xiaolan
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浏览/下载:6/0
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提交时间:2020/11/14
Electric fault currents
Electric machine control
Electric power system control
Electric power transmission networks
Proportional control systems
Two term control systems
Voltage regulators
Doubly fed induction generator (DFIG)
Doubly fed induction generators
Dynamic voltage restorer (DVR)
Fault ride-through
Negative sequence components
PID (proportionalintegral-derivative)
Power grids
Symmetrical component method
Design of high speed and parallel compression system used in the big area CCD of high frame frequency (EI CONFERENCE)
会议论文
2011 International Conference on Precision Engineering and Non-Traditional Machining, PENTM 2011, December 9, 2011 - December 11, 2011, Xi'an, China
Liu Y.-Y.
;
Gao Y.-H.
;
Li G.-N.
;
Wang W.-H.
;
Zhang R.-F.
;
Jin L.-X.
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浏览/下载:47/0
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提交时间:2013/03/25
According to the area CCD camera of characteristics
such as high resolution capacity and high frame frequency
this paper puts forward a high speed and parallel image compression system of high integration degree. Firstly
according to the work principle of the area CCD
FPGA is adopted to realize the timing driving and multichannel and parallel analog signal handling to raise the export frame frequency of the area CCD. Secondly
with an image compression scheme based on FPGA embedded processor MicroBlaze and ADV212 compression chip
real time image compression and the high speed area CCD are realized. Finally
by detecting the analog signal of the area CCD output
the real time compression of the big area CCD image is carried out in different compression ratios and the compression performance is analyzed. Experiment result shows that this scheme can realize real time image compression with the biggest data rate of 520Mbps. When compression bit ratio is 0.15
the signal-to-noise ratio of peak value can reach 36 dB. Image collection and image compression are integrated
which reduces the data transmission between them and improves systematic integration degree.
中国生态资产动态变化与环境效应分析
学位论文
博士, 成都: 中国科学院水利部成都山地灾害与环境研究所, 2008
范小杉
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浏览/下载:52/0
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提交时间:2010/10/15
生态资产
经济社会
生态环境
自然资源
中国
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