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科研机构
北京大学 [55]
内容类型
其他 [55]
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2016 [4]
2015 [5]
2014 [5]
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2011 [7]
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Delay-locked loop based frequency quadrupler with wide operating range and fast locking characteristics
其他
2016-01-01
Wang, Yuan
;
Liu, Yuequan
;
Jiang, Mengyin
;
Jia, Song
;
Zhang, Xing
收藏
  |  
浏览/下载:3/0
  |  
提交时间:2017/12/03
A novel low-leakage power-rail ESD clamp circuit with adjustable triggering voltage and superior false-triggering immunity for nanoscale applications
其他
2016-01-01
Lu, Guangyi
;
Wang, Yuan
;
Cao, Jian
;
Jia, Song
;
Zhang, Xing
收藏
  |  
浏览/下载:2/0
  |  
提交时间:2017/12/03
A Novel Low-leakage Power-rail ESD Clamp Circuit with Adjustable Triggering Voltage and Superior False-triggering Immunity for Nanoscale Applications
其他
2016-01-01
Lu, Guangyi
;
Wang, Yuan
;
Cao, Jian
;
Jia, Song
;
Zhang, Xing
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2017/12/03
Electrostatic discharge (ESD)
detection circuit
triggering voltage (V-t1)
leakage current (I-leak)
transmission line pulsing (TLP) test
PROTECTION DESIGN
Delay-locked loop based frequency quadrupler with wide operating range and fast locking characteristics
其他
2016-01-01
Wang, Yuan
;
Liu, Yuequan
;
Jiang, Mengyin
;
Jia, Song
;
Zhang, Xing
收藏
  |  
浏览/下载:2/0
  |  
提交时间:2017/12/03
quadrupler
delay-locked loop (DLL)
eight-phase-clock generator
edge-combiner
wide operating range
fast locking
MULTIPLIER
180.5Mbps-8Gbps DLL-Based Clock and Data Recovery Circuit with Low Jitter Performance
其他
2015-01-01
Liu, Yuequan
;
Wang, Yuan
;
Jia, Song
;
Zhang, Xing
收藏
  |  
浏览/下载:5/0
  |  
提交时间:2017/12/03
Clock and data recovery (CDR)
wide-range
delay-locked loop (DLL)
low jitter
time-to-digital converter (TDC)
Design on multi-bit adder using sense amplifier-based pass transistor logic for near-threshold voltage operation
其他
2015-01-01
Dang, Fangyuan
;
Wang, Yuan
;
Liu, Yuequan
;
Jia, Song
;
Zhang, Xing
收藏
  |  
浏览/下载:3/0
  |  
提交时间:2017/12/03
A reference-less all-digital burst-mode CDR with embedded TDC
其他
2015-01-01
Jiang, Mengyin
;
Wang, Yuan
;
Liu, Baoguang
;
Liu, Yuequan
;
Jia, Song
;
Zhang, Xing
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2017/12/03
Design on Multi-bit Adder Using Sense Amplifier-Based Pass Transistor Logic for Near-Threshold Voltage Operation
其他
2015-01-01
Dang, Fangyuan
;
Wang, Yuan
;
Liu, Yuequan
;
Jia, Song
;
Zhang, Xing
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2017/12/03
Near-threshold voltage (NTV)
low-power
sense amplifier
double pass-transistor logic (DPL)
multi-bit adder
Distributed Design and Implementation of SVD plus plus Algorithm for E-commerce Personalized Recommender System
其他
2015-01-01
Cao, Jian
;
Hu, Hengkui
;
Luo, Tianyan
;
Wang, Jia
;
Huang, May
;
Wang, Karl
;
Wu, Zhonghai
;
Zhang, Xing
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2017/12/03
Recommender system
Matrix decomposition
SVD plus
Distributed computation
E-commerce
Atomic layer deposition of high-quality HFO2 film on graphene using low energy electron beam pretreatment
其他
2014-01-01
Ye, Qing
;
Chen, Shen
;
Jia, Yuehui
;
Guo, Jian
;
Ren, Liming
;
Fu, Yunyi
;
Huang, Ru
;
Zhang, Xing
收藏
  |  
浏览/下载:5/0
  |  
提交时间:2015/11/13
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