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A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI 期刊论文
MICROELECTRONICS RELIABILITY, 2016, 卷号: 64, 页码: 26-30
作者:  Wang, Y.;  Cai, H.;  Naviner, L. A. B.;  Zhao, X. X.;  Zhang, Y.
收藏  |  浏览/下载:3/0  |  提交时间:2019/12/30
A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI 会议论文
27th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Halle, GERMANY, 2016-09-01
作者:  Wang, Y.;  Cai, H.;  Naviner, L. A. B.;  Zhao, X. X.;  Zhang, Y.
收藏  |  浏览/下载:3/0  |  提交时间:2019/12/30


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