A Fast and Power-Efficient Hardware Architecture for Non-Maximum Suppression | |
Shi, Man; Ouyang, Peng; Yin, Shouyi; Liu, Leibo; Wei, Shaojun | |
刊名 | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS |
2019 | |
卷号 | 66页码:1870-1874 |
关键词 | Face detection NMS algorithm hardware architecture |
ISSN号 | 1549-7747 |
DOI | 10.1109/TCSII.2019.2893527 |
URL标识 | 查看原文 |
收录类别 | SCIE ; EI |
WOS记录号 | WOS:000496217200020 |
内容类型 | 期刊论文 |
URI标识 | http://www.corc.org.cn/handle/1471x/5915013 |
专题 | 北京航空航天大学 |
推荐引用方式 GB/T 7714 | Shi, Man,Ouyang, Peng,Yin, Shouyi,et al. A Fast and Power-Efficient Hardware Architecture for Non-Maximum Suppression[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS,2019,66:1870-1874. |
APA | Shi, Man,Ouyang, Peng,Yin, Shouyi,Liu, Leibo,&Wei, Shaojun.(2019).A Fast and Power-Efficient Hardware Architecture for Non-Maximum Suppression.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS,66,1870-1874. |
MLA | Shi, Man,et al."A Fast and Power-Efficient Hardware Architecture for Non-Maximum Suppression".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 66(2019):1870-1874. |
个性服务 |
查看访问统计 |
相关权益政策 |
暂无数据 |
收藏/分享 |
除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。
修改评论