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清华大学 [4]
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Reading digital video clocks
期刊论文
International Journal of Pattern Recognition and Artificial Intelligence, 2015, 卷号: 29, 期号: 4
作者:
Yu, Xinguo
;
Ding, Wan
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浏览/下载:11/0
  |  
提交时间:2019/12/23
Digit localization
digit recognition
digital video clock
second-pixel periodicity
deep learning
conditional random field
The sequence measurement system of the IR camera (EI CONFERENCE)
会议论文
International Symposium on Photoelectronic Detection and Imaging 2011: Advances in Infrared Imaging and Applications, May 24, 2011 - May 24, 2011, Beijing, China
Geng A.-H.
;
Han H.-X.
;
Zhang H.-B.
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浏览/下载:33/0
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提交时间:2013/03/25
Currently
the IR cameras are broadly used in the optic-electronic tracking
optic-electronic measuring
fire control and optic-electronic countermeasure field
but the output sequence of the most presently applied IR cameras in the project is complex and the giving sequence documents from the leave factory are not detailed. Aiming at the requirement that the continuous image transmission and image procession system need the detailed sequence of the IR cameras
the sequence measurement system of the IR camera is designed
and the detailed sequence measurement way of the applied IR camera is carried out. The FPGA programming combined with the SignalTap online observation way has been applied in the sequence measurement system
and the precise sequence of the IR camera's output signal has been achieved
the detailed document of the IR camera has been supplied to the continuous image transmission system
image processing system and etc. The sequence measurement system of the IR camera includes CameraLink input interface part
LVDS input interface part
FPGA part
CameraLink output interface part and etc
thereinto the FPGA part is the key composed part in the sequence measurement system. Both the video signal of the CmaeraLink style and the video signal of LVDS style can be accepted by the sequence measurement system
and because the image processing card and image memory card always use the CameraLink interface as its input interface style
the output signal style of the sequence measurement system has been designed into CameraLink interface. The sequence measurement system does the IR camera's sequence measurement work and meanwhile does the interface transmission work to some cameras. Inside the FPGA of the sequence measurement system
the sequence measurement program
the pixel clock modification
the SignalTap file configuration and the SignalTap online observation has been integrated to realize the precise measurement to the IR camera. Te sequence measurement program written by the verilog language combining the SignalTap tool on line observation can count the line numbers in one frame
pixel numbers in one line and meanwhile account the line offset and row offset of the image. Aiming at the complex sequence of the IR camera's output signal
the sequence measurement system of the IR camera accurately measures the sequence of the project applied camera
supplies the detailed sequence document to the continuous system such as image processing system and image transmission system and gives out the concrete parameters of the fval
lval
pixclk
line offset and row offset. The experiment shows that the sequence measurement system of the IR camera can get the precise sequence measurement result and works stably
laying foundation for the continuous system. 2011 Copyright Society of Photo-Optical Instrumentation Engineers (SPIE).
MPEG-2TS中基于信道速率的时钟恢复方法
会议论文
第二届和谐人机环境联合学术会议(HHME2006)——第15届中国多媒体学术会议(NCMT'06)论文集, 第二届和谐人机环境联合学术会议(HHME2006)——第15届中国多媒体学术会议(NCMT'06), 中国浙江杭州, CNKI, 清华大学计算机科学与技术系、浙江大学计算机科学与技术学院
王静远
;
陶品
;
Jingyuan Wang
;
Pin Tao
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浏览/下载:3/0
基于视频应用的交叉寄存DDPS结构设计
期刊论文
2010, 2010
吴斯奇
;
王兴军
;
WU Si-qi
;
WANG Xing-jun
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浏览/下载:4/0
Two-stage high precision spindle CLV control method for unrecorded CD-R
期刊论文
2010, 2010
Yuan Haibo
;
Ma Jianshe
;
Xu Duanyi
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浏览/下载:4/0
VLSI design of a low power, fully pipelined JPEG-LS encoder for lossless image compression
期刊论文
2010, 2010
Li Xiaowen
;
Chen Xinkai
;
Li Guolin
;
Wang Zhihua
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浏览/下载:3/0
Study of Digital Video Interface (DVI) architecture design in computer system
会议论文
作者:
Bai, Xiaoping
;
Zhang, Hongwei
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浏览/下载:2/0
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提交时间:2019/12/18
Clock recovery circuit
Digital Video Interface (DVI)
Elasticity buffer
Loop Filter
Phase Frequency Detector (PFD)
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