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浏览/检索结果: 共2条，第1-2条 帮助 已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择作者升序作者降序题名升序题名降序发表日期升序发表日期降序提交时间升序提交时间降序 Embedded system of time uniform based on DSP (EI CONFERENCE) 会议论文 2010 International Conference on Computer, Mechatronics, Control and Electronic Engineering, CMCE 2010, August 24, 2010 - August 26, 2010, Changchun, China Li N.; Guo L.-H.; Chen J.; Liu C.-X. 收藏  |  浏览/下载：19/0  |  提交时间：2013/03/25 We introduced a design method of DSP-based System of time uniform  which combine the GPS and the Compass to calibrate the time. The system can use UTC (Coordinated Universal Time) of the GPS or the Compass for time base  to generate absolute time and different frequency of synchronous signals. We used DSP (Digital Signal Processor) to calculate the satellite information which includes the UTC time. After getting the UCT time information  put it into the CPLD (Complex Programmable Logic Device) for correction of time delay and serialization to output. Meanwhile  we divided 1PPS (one-pulse-per-second) signal of the GPS and the Compass into 20Hz  50Hz  and 800Hz synchronous signal. And we analyzed the precision of time and frequency. To conclude  the uncertainty of system absolute time is less than 100ns  the uncertainty of system synchronous signals is less than 20ns. This system is easy and flexible for use  stable and reliable in performance. 2010 IEEE.   The design of high-speed optical fiber communication system based on PCI bus (EI CONFERENCE) 会议论文 2010 2nd IEEE International Conference on Advanced Management Science, ICAMS 2010, July 9, 2010 - July 11, 2010, Chengdu, China Liang G.-L.; He X.; Wei Z.-H.; He J.-W.; Zhang L.-G. 收藏  |  浏览/下载：44/0  |  提交时间：2013/03/25 In order to increase the transmission distance and reduce noise effectively  a communication system with the optical fiber interface is developed in this paper. In the system  the PCI bus is adopted as the connection bus between the underlying optical fiber transceiver module circuitry and host computer using the WDM driver. The FPGA is the core logic of the whole system  responsible for data transmission and timing logic control. The module structure and the design method of the PCI bus  the principle and the design of optical interface module and the bottom-driven development are described in this paper. The experiment results show that the system has basically meet requirement targets. It can achieve the maximum transfer rate of 40MBps when running in the DMA mode. With long transmission distance  strong antiinterference and high scalability  this system has stable and reliable performance. 2010 IEEE.