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欧盟外交制度研究---以欧盟驻外代表机构为例 学位论文
2016, 2016
宗永锋
收藏  |  浏览/下载:44/0  |  提交时间:2017/06/20
民间社会在两岸整合过程中的角色与功能 学位论文
2011, 2011
成正
收藏  |  浏览/下载:1/0  |  提交时间:2016/02/14
Applied Research on the Enterprise-level Project Management System and Information Construction of Project General Contractor Enterprise 会议论文
International Conference on Civil Engineering and Transportation (ICCET 2011), Jinan, PEOPLES R CHINA, 2011-01-01
作者:  Zhang Jianwei;  Zhu Minjie;  Zhang Liwei
收藏  |  浏览/下载:2/0  |  提交时间:2019/12/18
“解严”后台湾民间组织政治性角色功能研究 学位论文
2010, 2010
林立辉
收藏  |  浏览/下载:1/0  |  提交时间:2016/02/14
社会助学与高教自学考试质量保证体系的建立 期刊论文
2010
盛文哲
收藏  |  浏览/下载:1/0  |  提交时间:2016/05/17
Chip design of linear CCD drive pulse generator and control interface (EI CONFERENCE) 会议论文
2nd International Symposium on Advanced Optical Manufacturing and Testing Technologies - Advanced Optical Manufacturing and Testing Technologies, November 2, 2005 - November 5, 2005, Xian, China
Cai R.; Sun H.; Wang Y.
收藏  |  浏览/下载:20/0  |  提交时间:2013/03/25
CCD noises and their causes are analyzed. Methods to control these noises  such as Correlated Double Sampling (CDS)  filtering  cooling  clamping  and calibration are proposed. To improve CCD sensor's performances  the IC  called Analog Front End (AFE)  integration of CDS  clamping  Programmable Gain Amplifier (PGA)  offset  and ADC  which can fulfill the CDS and analog-to-digital conversion  is employed to process the output signal of CCD. Based on the noise control approaches  the idea of chip design of linear CCD drive pulse generator and control interface is introduced. The chip designed is playing the role of (1) drive pulse generator  for both CCD and AFE  and (2) interface  helping to analysis and transfer control command and status information between MCU controller and drive pulse generator  or between global control unit in the chip and CCD/AFE. There are 6 function blocks in the chip designed  such as clock generator for CCD and AFE  MCU interface  AFE serial interface  output interface  CCD antiblooming parameter register and global control logic unit. These functions are implemented in a CPLD chip  Xilinx XC2C256-6-VQ100  with 20MHz pixel frequency  and 16-bit high resolution. This chip with the AFE can eliminate CCD noise largely and improve the SNR of CCD camera. At last  the design result is presented.  
台湾地区“宪政改造”对国家统一的影响 期刊论文
2006
刘国深
收藏  |  浏览/下载:1/0  |  提交时间:2011/04/26


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