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A Digital Switching Demodulator for Electrical Capacitance Tomography 期刊论文
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2013, 卷号: 62, 页码: 1025-1033
作者:  Xu, Lijun;  Zhou, Haili;  Cao, Zhang;  Yang, Wuqiang
收藏  |  浏览/下载：8/0  |  提交时间：2020/01/06
A Digital Switching Demodulator for Electrical Capacitance Tomography 会议论文
29th Annual IEEE International Instrumentation and Measurement Technology Conference (I2MTC), Graz, AUSTRIA, 2013-05-01
作者:  Xu, Lijun;  Zhou, Haili;  Cao, Zhang;  Yang, Wuqiang
收藏  |  浏览/下载：4/0  |  提交时间：2020/01/06
Run-length-limited (4,13) code for high density optical storage systems 期刊论文
2010, 2010
Xin Yang; Mali Gong; Lei Huang; Haitao Zhang
收藏  |  浏览/下载：3/0
Research on control scheme in high-density multiwavelength optical disc mastering 会议论文
Proceedings of the SPIE - The International Society for Optical Engineering, Optical Data Storage 2004, Monterey, CA, USA, INSPEC
Yuhe Li; Qingxiang Li; Dapeng Zhao; Sheng Li; Peijun Jiang
收藏  |  浏览/下载：2/0
On-line image ferrograph's hardware system 期刊论文
2010, 2010
Wu Xin; Liu Yan; Lu Xiaojun; He Yao; Feng Guanping
收藏  |  浏览/下载：3/0
Embedded system of time uniform based on DSP (EI CONFERENCE) 会议论文
2010 International Conference on Computer, Mechatronics, Control and Electronic Engineering, CMCE 2010, August 24, 2010 - August 26, 2010, Changchun, China
Li N.; Guo L.-H.; Chen J.; Liu C.-X.
收藏  |  浏览/下载：19/0  |  提交时间：2013/03/25
We introduced a design method of DSP-based System of time uniform  which combine the GPS and the Compass to calibrate the time. The system can use UTC (Coordinated Universal Time) of the GPS or the Compass for time base  to generate absolute time and different frequency of synchronous signals. We used DSP (Digital Signal Processor) to calculate the satellite information which includes the UTC time. After getting the UCT time information  put it into the CPLD (Complex Programmable Logic Device) for correction of time delay and serialization to output. Meanwhile  we divided 1PPS (one-pulse-per-second) signal of the GPS and the Compass into 20Hz  50Hz  and 800Hz synchronous signal. And we analyzed the precision of time and frequency. To conclude  the uncertainty of system absolute time is less than 100ns  the uncertainty of system synchronous signals is less than 20ns. This system is easy and flexible for use  stable and reliable in performance. 2010 IEEE.  
Research on synchronous generator automatic quasi-synchronising device 期刊论文
International Journal of Modelling, Identification and Control, 2009, 卷号: 7, 期号: 4, 页码: 388-391
作者:  Zhang, Xiaoying;  Dang, Cunlu;  Chai, Li
收藏  |  浏览/下载：21/0  |  提交时间：2020/11/14
Design of generator automatic quasi-synchronizing device based on microprocessor and CPLD 期刊论文
Dianli Zidonghua Shebei / Electric Power Automation Equipment, 2007, 卷号: 27, 期号: 8, 页码: 102-105
作者:  Zhang, Xiao-Ying;  Dang, Cun-Lu;  Wang, Shu-Dong
收藏  |  浏览/下载：21/0  |  提交时间：2020/11/14
CPLD implementation of 1024-point FFT of short-wave wideband channel simulator 期刊论文
CHINESE JOURNAL OF ELECTRONICS, 2006, 卷号: 15, 期号: 4
作者:  Gan Liangcai;  Ding Yahui;  Li Yuanyuan
收藏  |  浏览/下载：2/0  |  提交时间：2019/12/05
A new synchronization control circuit based on CPLD for the laser range-gated imaging system (EI CONFERENCE) 会议论文
ICO20: Lasers and Laser Technologies, August 21, 2005 - August 26, 2005, Changchun, China
Xu X.; Wang X.; Tang F.; Yu Q.; Guo J.
收藏  |  浏览/下载：20/0  |  提交时间：2013/03/25
The synchronization control technique is one of the most key techniques in the laser range gated (LRG) imaging system. Conventional control circuits are composed of discrete components and Medium Scale Integration (MSI) and Small Scale Integration (SSI)  which have bad reliability and poor ability of anti-interference. The idea of using the Complex Programmable Logic Device (CPLD) to realize the monostable trigger circuit is introduced. On the basis of analyzing the performance requirement to the synchronization control of the laser range gated imaging system  a new synchronization control circuit based on CPLD is presented. The circuit based on CPLD is very compact and flexible and has high reliability and strong ability of anti-interference. The synchronization control circuit based on CPLD can provide a wide selection of gate widths  pulse widths and delays. The synchronization control circuit is successfully used in our experiment and the expected result is obtained.  

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