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清华大学 [5]
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Design and sopc-based realization of a video chaotic secure communication scheme
期刊论文
International Journal of Bifurcation and Chaos, 2018, 卷号: 28
作者:
Chen, P.
;
Yu, S.
;
Chen, B.
;
Xiao, L.
;
Lu, J.
收藏
  |  
浏览/下载:2/0
  |  
提交时间:2019/12/30
Cryptography
Field programmable gate arrays (FPGA)
Hardware
Security systems
Anticontrol
Chaotic secure communications
Hardware realization
Programmable chips
Real time performance
Security analysis
SOPC-based realization
Video encryption
Integrated circuit design
Interface circuit design and control system programming for an EMCCD camera based on camera link
会议论文
5th International Symposium on Photoelectronic Detection and Imaging (ISPDI) - Imaging Sensors and Applications, Beijing, PEOPLES R CHINA, 2013-06-25
作者:
Li, BH
;
Rao, XH
;
Yan, J
;
Li, DL
;
Zhang YG(张益恭)
收藏
  |  
浏览/下载:25/0
  |  
提交时间:2016/04/11
Camera Link
Circuit design
FPGA
SOPC
Camera control
Programming
The PWM controller design based on Nios II
期刊论文
2010, 2010
Yu Yi
;
Ma Cheng
;
Jia Hui-bo
收藏
  |  
浏览/下载:3/0
Drive loop design of single axis gyroscope based on SOPC
期刊论文
2010, 2010
Zhou Wen-wen
;
Zhang Rong
;
Zhou Bin
;
Chen Zhi-yong
收藏
  |  
浏览/下载:3/0
基于NIOS2软核CPU的嵌入式系统设计
会议论文
第十三届全国核电子学与核探测技术学术年会论文集(下册), 第十三届全国核电子学与核探测技术学术年会, 中国陕西西安, CNKI, 中国电子学会、中国核学会核电子学与核探测技术分会
郑健
;
Jianzheng
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  |  
浏览/下载:4/0
最新的SOPC技术与EDA实验教学
期刊论文
2010, 2010
韦思健
;
张驰
;
韩文龙
;
马博坤
;
WEI Si-jian
;
ZHANG Chi
;
HAN Wen-long
;
MA Bo-kun
收藏
  |  
浏览/下载:3/0
Design of LCD and Matrix_Key_Board SOPC peripheral components
期刊论文
2010, 2010
Gao Bing
;
Chen Liping
;
Qin Jian
;
Tang Guangrong
收藏
  |  
浏览/下载:5/0
Design and implementation of high-speed digital CMOS camera driving control timing and data interface (EI CONFERENCE)
会议论文
Sixth International Symposium on Instrumentation and Control Technology: Sensors, Automatic Measurement, Control and Computer Simulation, October 13, 2006 - October 15, 2006, Beijing, China
Sun H.
;
Cai R.
;
Wang Y.
收藏
  |  
浏览/下载:27/0
  |  
提交时间:2013/03/25
High-speed digital cameras are progressing rapidly with the development of CMOS image sensor in these few years. In order to develop a high-speed CMOS industrial digital camera
the CMOS image sensor MI-MV13 is used. The sensor drive pulse and control timing based on Xilinx Virtex-II Pro FPGA is designed. A novel format of digital image transporting based on Camera Link data port is defined in this paper. It is implemented 1280 (H) 1024 (V) SXGA resolution digital image transported at a high frame rate of 300 fps (frames-per-second) with 5 Pixels 10 bit compatible Camera Link Medium Configuration. In addition
these functions that adjustments of exposure beginning time
integral time
AOI (Area of Interest) output and so on
are realized in a FPGA chip. All of the function modules are embedded in a SOPC (System on a Programmable Chip)
and further functions can be easily added to the chip at the second time development. Experimental results show that the design of driving control timing and data interface in FPGA is suitable for high-frame rate
low power
intelligent and miniaturization digital video camera.
Application of EDA Technology on Professional Teaching for Electronic Information Engineering
会议论文
Shenzhen, China 【会议录】, 2010
作者:
HaibingQi
收藏
  |  
浏览/下载:1/0
  |  
提交时间:2020/01/04
Electronic
Design
Automation
technology
VHDL
language
PROTEL
SOPC
builder
Electronic
information
engineering
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