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浏览/检索结果: 共7条，第1-7条 帮助 已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择发表日期升序发表日期降序作者升序作者降序提交时间升序提交时间降序题名升序题名降序 量子通信系统中基于FPGA的偏振控制 期刊论文 系统工程与电子技术, 2016 安辉耀; 刘敦伟; 耿瑞华; 曾和平; 赵林欣 收藏  |  浏览/下载：4/0  |  提交时间：2017/12/04 量子通信  现场可编程门阵列  偏振控制  quantum security communication  field programmable gate array (FPGA)  polarization controlling   DRM hardware receiver design and implementation 期刊论文 2010, 2010 Chen Xu-dong; Xu Shu-zheng 收藏  |  浏览/下载：4/0 节制闸控制下宽浅渠道内的非恒定流 期刊论文 2010, 2010 史哲; 马吉明; 郑双凌; SHI Zhe; MA Ji-ming; ZHENG Shuang-ling 收藏  |  浏览/下载：5/0 Hardware/software co-verification platform for EOS design 期刊论文 2010, 2010 Wang Peng; Jin Depeng; Zeng Lieguang 收藏  |  浏览/下载：3/0 Multi-channel high-speed TDICCD image data acquisition and storage system (EI CONFERENCE) 会议论文 2010 International Conference on E-Product E-Service and E-Entertainment, ICEEE2010, November 7, 2010 - November 9, 2010, Henan, China Zang J.; Li Y.; Xue X.; Guo Y. 收藏  |  浏览/下载：23/0  |  提交时间：2013/03/25 For multi-channel high-speed image data of certain space remote sensing camera  this paper proposed a new image data acquisition and storage system. First of all  the system uses Field-Programmable Gate Array(FPGA) controlling synchronous dynamic random access memory(SDRAM) array to realize the cache of image data  then according to the received commands  sends certain channel's image data to the acquisition card to write the image data into SCSI hard disk and implements the final storage. A Time Delay Integral Charge Couple Device(TDICCD) image data acquisition and storage system with five channels is developed  pixel clock rate is up to 96MHz  total effective data rate is up to 2.88Gb/s  single channel storage depth is up to 7810 lines. The experimental results indicate that this system work stably  high effectively which can meet the requirement of acquisition and storage of multi-channel high-speed TDICCD image data. 2010 IEEE.   The effect of N/Si ratio on the a-SiiH/SiNx interface of a-SirH/SiNx TFT (EI CONFERENCE) 会议论文 Asia Display 2007, AD'07, March 12, 2007 - March 16, 2007, Shanghai, China Liu J. e.; Gao W.; Liao Y.; Jing H.; Fu G. 收藏  |  浏览/下载：19/0  |  提交时间：2013/03/25 The threshold voltage of a-Si: H/SiNx TFT will shift under long time gate bias stress  it is mostly leaded by charge trapping in gate insulator and defect creation in semiconductor. And it is hard to be applied in AMOLED for TFT because of its threshold voltage shift. In allusion to the phenomenon of charge trapping  a series of SiNx insulating films in different N/Si(0. 87 -1.68) ratio were deposited by PECVD in this paper  controlling different flow ratio of source gas SiH4 and NH3  and a great deal of tests (ellipsometer  infrared absorption (FTIR) and Electron Dispersion Spectrum (EDS) test ) were done on these samples. Based on these SiNx insulators  three different capacitance samples in MIS structure were done  degraded experiments and C-V tests on these samples were done. The C-V curve shift of capacitance which contained SiNx with slightly N-rich(N/Si is bigger slightly than 1. 33) was not evident before and after degradation  this result indicated that the defect density of this type SiN x was smaller  and could restrain charge chapping in the interface of a-Si:H/SiNx effectively. So that as gate insulator of TFT  SiN x with slightly N-rich could decrease the threshold voltage shift of TFT and enhance its stability effectively.   How to control a geometric quantum gate 期刊论文 CHINESE PHYSICS, 2002, 卷号: 11, 页码: 109-114 作者:  Hao, SR;  Hou, BY;  Xi, XQ;  Yue, RH 收藏  |  浏览/下载：8/0  |  提交时间：2018/05/31 laser controlling mechanism  geometric quantum gate  two-level system