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Study on Harmonic Response of Bistable System with Linear Amplifier
会议论文
PROCEEDINGS OF 2019 IEEE 3RD INFORMATION TECHNOLOGY, NETWORKING, ELECTRONIC AND AUTOMATION CONTROL CONFERENCE (ITNEC 2019), 2019-01-01
作者:
Liu, Lilan
;
Zhu, Guodong
;
Tan, Hongbo
收藏
  |  
浏览/下载:10/0
  |  
提交时间:2019/12/20
bistable
harmonic excitation
linear amplifier
output power
optimal parameters range
Low-Noise High-Linearity 56Gb/s PAM-4 Optical Receiver in 45nm SOI CMOS
会议论文
作者:
Xie, Yang
;
Li, Dan
;
Liu, Yiqun
;
Liu, Ming
;
Zhang, Yihua
收藏
  |  
浏览/下载:4/0
  |  
提交时间:2019/11/26
Control techniques
High linearity
Input referred noise
Linear operations
Low noise
Signal amplifications
Trans-impedance gain
Transimpedance amplifier (TIA)
Design and test of a novel cost-effective piezo driven actuator with a two-stage flexure amplifier for chopping mirrors
会议论文
Amsterdam, Netherlands, 2012-7-1
Qingguo Wu
;
Dehua Yang
;
Aihua Li
;
Guohua Zhou
;
Bintang Yang
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  |  
浏览/下载:21/0
  |  
提交时间:2014/01/09
linear actuator
two-stage displacement amplifier
piezoelectric and magnetostrictive
flexure
finite element analysis
Chip design of linear CCD drive pulse generator and control interface (EI CONFERENCE)
会议论文
2nd International Symposium on Advanced Optical Manufacturing and Testing Technologies - Advanced Optical Manufacturing and Testing Technologies, November 2, 2005 - November 5, 2005, Xian, China
Cai R.
;
Sun H.
;
Wang Y.
收藏
  |  
浏览/下载:20/0
  |  
提交时间:2013/03/25
CCD noises and their causes are analyzed. Methods to control these noises
such as Correlated Double Sampling (CDS)
filtering
cooling
clamping
and calibration are proposed. To improve CCD sensor's performances
the IC
called Analog Front End (AFE)
integration of CDS
clamping
Programmable Gain Amplifier (PGA)
offset
and ADC
which can fulfill the CDS and analog-to-digital conversion
is employed to process the output signal of CCD. Based on the noise control approaches
the idea of chip design of linear CCD drive pulse generator and control interface is introduced. The chip designed is playing the role of (1) drive pulse generator
for both CCD and AFE
and (2) interface
helping to analysis and transfer control command and status information between MCU controller and drive pulse generator
or between global control unit in the chip and CCD/AFE. There are 6 function blocks in the chip designed
such as clock generator for CCD and AFE
MCU interface
AFE serial interface
output interface
CCD antiblooming parameter register and global control logic unit. These functions are implemented in a CPLD chip
Xilinx XC2C256-6-VQ100
with 20MHz pixel frequency
and 16-bit high resolution. This chip with the AFE can eliminate CCD noise largely and improve the SNR of CCD camera. At last
the design result is presented.
Design of feedforward linear power amplifier (CPCI-S收录)
会议论文
2004 4th INTERNATIONAL CONFERENCE ON MICROWAVE AND MILLIMETER WAVE TECHNOLOGY PROCEEDINGS
作者:
Liao, L
;
Chu, QX
;
Zeng, QF
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  |  
浏览/下载:1/0
  |  
提交时间:2019/04/18
feed-forward
linear
power amplifier
adaptive
look-up-table
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