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浏览/检索结果: 共6条，第1-6条 帮助 限定条件 发表日期：2018     已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择作者升序作者降序题名升序题名降序发表日期升序发表日期降序提交时间升序提交时间降序 32-Bit 4 x 4 Bit-Slice RSFQ Matrix Multiplier 期刊论文 IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, 2018, 卷号: 28, 期号: 7, 页码: 5 作者:  Tang, Guang-Ming;  Qu, Pei-Yao;  Ye, Xiao-Chun;  Fan, Dong-Rui;  Sun, Ning-Hui 收藏  |  浏览/下载：37/0  |  提交时间：2019/12/10 Hardware algorithm  matrix multiplier  micro-processor  rapid single-flux-quantum (RSFQ)  superconducting integrated circuits   LOCx2-130, a low-power, low-latency, 2 × 4.8-Gbps serializer ASIC for detector front-end readout 期刊论文 Journal of Instrumentation, 2018, 卷号: 13, 期号: 08, 页码: P08002 作者:  Xiao, L.;  Sun, Q.;  Gong, D.;  Baker, E.;  Deng, B. 收藏  |  浏览/下载：12/0  |  提交时间：2019/12/23 Front-end electronics for detector readout  Trigger concepts and systems (hardware and software)  Digital electronic circuits   Embedded System Confidentiality Protection by Cryptographic Engine Implemented with Composite Field Arithmetic 会议论文 MATEC Web of Conferences 作者:  Wang, W.;  Wang, X.;  Du, P.;  Tian, Y.;  Zhang, X. 收藏  |  浏览/下载：4/0  |  提交时间：2019/12/30 Computer circuits  Cryptography  Engines  Hardware  Hardware security  Network security  Programmable logic controllers  System-on-chip  Composite field arithmetics  Cryptographic engines  Encryption and decryption  Hardware implementations  Memory encryption  Proposed architectures  Protection methods  Resource consumption  Embedded systems   A Computing Efficient Hardware Architecture for Sparse Deep Neural Network Computing 会议论文 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings 作者:  Zhang, Y.;  Ouyang, P.;  Yin, S.;  Zhao, W.;  Wei, S. 收藏  |  浏览/下载：2/0  |  提交时间：2019/12/30 Integrated circuits  Memory architecture  Network architecture  Neural networks  Convolutional neural network  Dataflow  Hardware architecture  Load imbalance  Memory consumption  State of the art  State-of-the-art performance  Switching strategies  Deep neural networks   Reconfigurable Logic based on Voltage-Controlled Magnetic Tunnel Junction (VC-MTJ) for Stochastic Computing 会议论文 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018 - Proceedings 作者:  Zhang, Z.;  Zhang, Y.;  Wang, R.;  Zeng, L.;  Huang, R. 收藏  |  浏览/下载：2/0  |  提交时间：2019/12/30 Computation theory  Computer circuits  Integrated circuits  Logic devices  Magnetic devices  Number theory  Stochastic systems  Tunnel junctions  Logic operations  Magnetic tunnel junction  Operation mode  Pulse currents  Reconfigurable logic  Stochastic computing  Stochastic numbers  Voltage-controlled  Reconfigurable hardware   Sensitivity analysis of ring oscillator based hardware Trojan detection 会议论文 International Conference on Communication Technology Proceedings, ICCT 作者:  Qin, Y.;  Xia, T. 收藏  |  浏览/下载：4/0  |  提交时间：2019/12/30 Field programmable gate arrays (FPGA)  Hardware  Integrated circuits  Malware  Oscillators (electronic)  Sensitivity analysis  Switching  Detection accuracy  Detection methods  Detection sensitivity  Hardware Trojan detection  Ring oscillator  Security  Spatial influences  Trojan detections  Hardware security