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A method for Rapid Deployment of Brushless DC Motor Servo System Model Based on FPGA
会议论文
Dalian, China, July 15-17, 2021
作者:
Wang, Baolun
;
Zhang T(张涛)
;
Shi, Zhengjin
;
Zhang HL(张华良)
;
Xie, Feng
收藏
  |  
浏览/下载:13/0
  |  
提交时间:2021/11/21
MBD
HDL Coder
BLDC
Servo Control
Design of imaging circuitry of space CCD camera based on FPGA
会议论文
Beijing, China, 2017-06-04
作者:
Liu, Meiying
;
Wen, Desheng
;
Wang, Hu
;
Liu, Yang
;
Zhao, Hui
收藏
  |  
浏览/下载:17/0
  |  
提交时间:2018/03/07
Improved automatic exposure algorithm for the stereoscopic panoramic camera in space application
会议论文
Beijing, China, 2017-06-04
作者:
Wang, Jiali
;
Duan, Yongqiang
;
Zheng, Peiyun
;
Gao, Wei
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  |  
浏览/下载:28/0
  |  
提交时间:2018/03/07
LABTM control system based on FPGA
会议论文
2nd International Conference on Mechatronics and Applied Mechanics, ICMAM 2012, December 8, 2012 - December 9, 2012, Taiwan
Li X. F.
;
Wang X. P.
;
Qi X. D.
;
Wang Y.
;
Yu P.
收藏
  |  
浏览/下载:18/0
  |  
提交时间:2014/05/15
LABTM control system based on FPGA (EI CONFERENCE)
会议论文
2nd International Conference on Mechatronics and Applied Mechanics, ICMAM 2012, December 8, 2012 - December 9, 2012, Taiwan
Li X. F.
;
Wang X. P.
;
Qi X. D.
;
Wang Y.
;
Yu P.
收藏
  |  
浏览/下载:141/0
  |  
提交时间:2013/03/25
This paper presents the digital PI control method for design and simulation of a high precision limited angle brushless torque motor control system in Field Programmable Gate Array device (FPGA). The direct drive structures which are widely applied in many servo control fields. Matlab Xilinx System GeneratorR toolbox based on Fixed-Point Arithmetic is used to design the digital PI controller using DSP architecture
plot the responses of the control system and generate the VHDL source code. The control system model consists of a digital PI
a real LABTM
and a real absolute Inductosyn
encoder to rpm and position blocks. Through loading generated codes in process of the simulation that built by the digital discrete model
it is verified that the rising time of current loop is only 1.2ms
and rate loop is 8ms
overshoot is rarely 4.2%. Finally
the comprehensive positioning accuracy of system can reach up to 5 arc sec
and the rate jitter achieves 5% with the 4 arc sec accuracy absolute Inductosyn. (2013) Trans Tech Publications
Switzerland.
基于FPGA的圆柱体停车场控制算法设计
会议论文
2013年中国智能自动化会议论文集中国自动化学会, 扬州, 2013-07-26
作者:
尹睿涵
;
韩延义
;
徐帅
;
李岳
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  |  
浏览/下载:2/0
  |  
提交时间:2019/12/13
VHDL硬件设计 FPGA 停车场 圆柱体停车场 最优路径
Steroid hormone 20-hydroxyecdysone regulation of the very-high-density lipoprotein (VHDL) receptor phosphorylation for VHDL uptake
会议论文
作者:
收藏
  |  
浏览/下载:6/0
  |  
提交时间:2019/12/31
Very-high-density lipoprotein (VHDL)
Very-high-density lipoprotein receptor (VHDL-R)
VHDL absorption
phosphorylation
20-hydroxyecdysone
一种高速卷积编码技术及其Viterbi译码技术研究
会议论文
中国广西北海 中国空间科学学会空间探测专业委员会第十六次学术会议
潘长勇
;
丁锐
;
杨知行
;
房海东
收藏
  |  
浏览/下载:2/0
  |  
提交时间:2017/06/15
卷积编码
并行处理
Viterbi译码
空间通信
A new approach to realize UART (EI CONFERENCE)
会议论文
2011 International Conference on Electronic and Mechanical Engineering and Information Technology, EMEIT 2011, August 12, 2011 - August 14, 2011, Harbin, China
Wang Y.
;
Song K.
收藏
  |  
浏览/下载:23/0
  |  
提交时间:2013/03/25
In order to connect DSP which has synchronous serial ports to the devices implementing asynchronous communications protocol
a method to implement UART communications based on programmable logic device is proposed in the paper. In the proposed method
the core function of UART is integrated in CPLD with VHDL. Firstly
UART data frame format and operational principle of UART were introduced after reviewing some methods to realize UART. The methods to implement UART transmitter
UART receiver and baudrate generator using VHDL were illustrated in detail. Then pre-simulation and synthesize of VHDL program were executed. Finally
the test with bit error rate was carried out on physical system. Experimental results indicate that 75 percent of the GLB are used by UART
and the bit error rate is less than 109. The experiment was implemented utilizing the RS-422 protocol and the baudrate is 62.5kb/s. The proposed method can satisfy the system requirements of high integration
stabilization
low bit error rate
strong anti-jamming and low cost. 2011 IEEE.
Improved algorithm of LED display image based on composed correction (EI CONFERENCE)
会议论文
International Conference on Advances in Computer Science, Environment, Ecoinformatics, and Education, CSEE 2011, August 21, 2011 - August 22, 2011, Wuhan, China
Song X.-J.
;
Ma X.-Q.
;
Liu W.-Y.
;
Zheng X.-F.
收藏
  |  
浏览/下载:11/0
  |  
提交时间:2013/03/25
In order to enhance the display result of the LED display image
an improved algorithm of LED display image based on composed correction is proposed. Firstly
the correction principle and the development status of the current correction technologies of the LED display image is introduced
and the two main correction technologies are analyzed. Secondly
the theory of composed correction is proposed by constructing a mathematical model. Thirdly
this algorithm is achieved in VHDL which is one of hardware description language
and verified in an experimental platform. Experimental results show that this algorithm is able to enhance the display result of the LED display image significantly. 2011 Springer-Verlag Berlin Heidelberg.
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