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长春光学精密机械与物... [5]
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会议论文 [5]
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2010 [3]
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内容类型:会议论文
专题:长春光学精密机械与物理研究所
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Design of multispectral remote sensing image compression system (EI CONFERENCE)
会议论文
2010 International Conference on Computer Application and System Modeling, ICCASM 2010, October 22, 2010 - October 24, 2010, Shanxi, Taiyuan, China
Fan Z.-L.
;
Xu S.-Y.
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浏览/下载:17/0
  |  
提交时间:2013/03/25
In order to get the higher compression quality of multispectral remote sensing image
which taken the JPEG2000 as the standard
used FPGA and special compression chip ADV212 to realize the remote sensing image compression system is proposed. The system used the specialty compression chip ADV212 which is newly relaesed by Analog Device company. It used to develop fast high-quality compression for the large amount of remote sensing image data. The system realized the image data's input
the compression stream's output
the image preprocessing as well as to control the ADV212 chip's working pattern through FPGA. The experiment result shows that this system which has such characteristics as low power consumption. low cost and easy adjustmen and has a good compressing effect. Meet the requirement of the multispectral remote sensing image's high compression ratio. 2010 IEEE.
The system of 24-channel digital potentiometers based on single-chip microcomputer (EI CONFERENCE)
会议论文
2010 3rd International Conference on Advanced Computer Theory and Engineering, ICACTE 2010, August 20, 2010 - August 22, 2010, Chengdu, China
Song X.-R.
;
Liu Z.-G.
;
Wu Z.-Y.
;
Yu A.-F.
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  |  
浏览/下载:28/0
  |  
提交时间:2013/03/25
This paper introduces that using digital potentiometers output 24-channel resistance to simulate the thermistors. Every channel has two digital potentiometers
one is low resolution and high value
the other is high resolution and low value. They are connected through Daisy-Chain and share chip-select. 24-channel digital potentiometers share the SPI's clock and SDI. Input the parameter in the computer and then send it to the single-chip microcomputer. The single-chip microcomputer receives the parameter and sends it to the digital potentiometers. After correcting the errors
the system meets the demands which are resistance range of 040K and maximum error of 15. The design can replace the traditional way in which the mechanical potentiometers are used to simulate the thermistors. 2010 IEEE.
The design of SD-SDI video conversion card based on FPGA (EI CONFERENCE)
会议论文
2010 3rd International Conference on Advanced Computer Theory and Engineering, ICACTE 2010, August 20, 2010 - August 22, 2010, Chengdu, China
Qi C.
;
He X.
;
Wei Z.-H.
;
Guo W.-B.
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浏览/下载:26/0
  |  
提交时间:2013/03/25
Based on the host chip of FPGA
it designed digital video conversion equipment
and completed the conversion between video with SD-SDI interface and Camera Link. After collecting the video from the camera
demosaicing
converting the color space
de-interlacing
interlacing and other operation
the circuit implemented the real-time video conversion between both different interfaces. With much flexibility
high integration and less hardware resources
the whole system completed a high-quality video solution. 2010 IEEE.
Design and implementation of high-speed digital CMOS camera driving control timing and data interface (EI CONFERENCE)
会议论文
Sixth International Symposium on Instrumentation and Control Technology: Sensors, Automatic Measurement, Control and Computer Simulation, October 13, 2006 - October 15, 2006, Beijing, China
Sun H.
;
Cai R.
;
Wang Y.
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浏览/下载:27/0
  |  
提交时间:2013/03/25
High-speed digital cameras are progressing rapidly with the development of CMOS image sensor in these few years. In order to develop a high-speed CMOS industrial digital camera
the CMOS image sensor MI-MV13 is used. The sensor drive pulse and control timing based on Xilinx Virtex-II Pro FPGA is designed. A novel format of digital image transporting based on Camera Link data port is defined in this paper. It is implemented 1280 (H) 1024 (V) SXGA resolution digital image transported at a high frame rate of 300 fps (frames-per-second) with 5 Pixels 10 bit compatible Camera Link Medium Configuration. In addition
these functions that adjustments of exposure beginning time
integral time
AOI (Area of Interest) output and so on
are realized in a FPGA chip. All of the function modules are embedded in a SOPC (System on a Programmable Chip)
and further functions can be easily added to the chip at the second time development. Experimental results show that the design of driving control timing and data interface in FPGA is suitable for high-frame rate
low power
intelligent and miniaturization digital video camera.
Study on optical parts of MOEMS optical switch with low insertion loss (EI CONFERENCE)
会议论文
MEMS/MOEMS Technologies and Applications II, November 10, 2004 - November 12, 2004, Beijing, China
Ming A.
;
Liang J.
;
Lan W.
;
Dong W.
;
Yao J.
;
Wang W.
;
Le Z.
;
Chen W.
;
Wang L.
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  |  
浏览/下载:24/0
  |  
提交时间:2013/03/25
We study insertion losses of optical switch when the laser beam is propagating during the free space between two single mode fibers (SMFs) and the related assemblage challenges
Then a new packaging structure is developed for the hybrid-integration of free-space MOEMS (micro-opto-electro-mechanical systems) chip with a silicon micromachined submount to improve alignment accuracy. The submount is designed to accommodate various free-space MOEMS chips with minimal active optical alignment
thus reducing the packaging cost. The silicon submount has a central recess to place the MOEMS chip in
sixteen V-grooves for optical fibers
and micropits for micro ball lenses
all bulk micromachined at the same time by a single anisotropic wet etching step. A corner compensation technique is employed to prevent erosion of the convex corners
where different geometries meet. Through this assembling method
the fiber
micro ball lens can be aligned preciously thus reduced lateral and angular misalignment between them. Then total insertion losses can be decreased.
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