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浏览/检索结果: 共6条，第1-6条 帮助 限定条件 内容类型：会议论文    专题：长春光学精密机械与物理研究所    第一署名单位    第一作者单位    通讯作者单位     已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择作者升序作者降序题名升序题名降序发表日期升序发表日期降序提交时间升序提交时间降序 Laser pulse coded signal frequency measuring device based on DSP and CPLD 会议论文 作者:  Guo RH(郭汝海) 收藏  |  浏览/下载：10/0  |  提交时间：2012/05/12 Laser pulse coded signal frequency measuring device based on DSP and CPLD (EI CONFERENCE) 会议论文 International Symposium on Photoelectronic Detection and Imaging 2011: Laser Sensing and Imaging; and Biological and Medical Applications of Photonics Sensing and Imaging, May 24, 2011 - May 26, 2011, Beijing, China Zhang H.-B.; Cao L.-H.; Geng A.-H.; Li Y.; Guo R.-H.; Wang T.-F. 收藏  |  浏览/下载：24/0  |  提交时间：2013/03/25 Laser pulse code is an anti-jamming measures used in semi-active laser guided weapons. On account of the laser-guided signals adopting pulse coding mode and the weak signal processing  it need complex calculations in the frequency measurement process according to the laser pulse code signal time correlation to meet the request in optoelectronic countermeasures in semi-active laser guided weapons. To ensure accurately completing frequency measurement in a short time  it needed to carry out self-related process with the pulse arrival time series composed of pulse arrival time  calculate the signal repetition period  and then identify the letter type to achieve signal decoding from determining the time value  number and rank number in a signal cycle by Using CPLD and DSP for signal processing chip  designing a laser-guided signal frequency measurement in the pulse frequency measurement device  improving the signal processing capability through the appropriate software algorithms. In this article  we introduced the principle of frequency measurement of the device  described the hardware components of the device  the system works and software  analyzed the impact of some system factors on the accuracy of the measurement. The experimental results indicated that this system improve the accuracy of the measurement under the premise of volume  real-time  anti-interference  low power of the laser pulse frequency measuring device. The practicality of the design  reliability has been demonstrated from the experimental point of view.   A new approach to realize UART (EI CONFERENCE) 会议论文 2011 International Conference on Electronic and Mechanical Engineering and Information Technology, EMEIT 2011, August 12, 2011 - August 14, 2011, Harbin, China Wang Y.; Song K. 收藏  |  浏览/下载：23/0  |  提交时间：2013/03/25 In order to connect DSP which has synchronous serial ports to the devices implementing asynchronous communications protocol  a method to implement UART communications based on programmable logic device is proposed in the paper. In the proposed method  the core function of UART is integrated in CPLD with VHDL. Firstly  UART data frame format and operational principle of UART were introduced after reviewing some methods to realize UART. The methods to implement UART transmitter  UART receiver and baudrate generator using VHDL were illustrated in detail. Then pre-simulation and synthesize of VHDL program were executed. Finally  the test with bit error rate was carried out on physical system. Experimental results indicate that 75 percent of the GLB are used by UART  and the bit error rate is less than 109. The experiment was implemented utilizing the RS-422 protocol and the baudrate is 62.5kb/s. The proposed method can satisfy the system requirements of high integration  stabilization  low bit error rate  strong anti-jamming and low cost. 2011 IEEE.   Embedded system of time uniform based on DSP (EI CONFERENCE) 会议论文 2010 International Conference on Computer, Mechatronics, Control and Electronic Engineering, CMCE 2010, August 24, 2010 - August 26, 2010, Changchun, China Li N.; Guo L.-H.; Chen J.; Liu C.-X. 收藏  |  浏览/下载：19/0  |  提交时间：2013/03/25 We introduced a design method of DSP-based System of time uniform  which combine the GPS and the Compass to calibrate the time. The system can use UTC (Coordinated Universal Time) of the GPS or the Compass for time base  to generate absolute time and different frequency of synchronous signals. We used DSP (Digital Signal Processor) to calculate the satellite information which includes the UTC time. After getting the UCT time information  put it into the CPLD (Complex Programmable Logic Device) for correction of time delay and serialization to output. Meanwhile  we divided 1PPS (one-pulse-per-second) signal of the GPS and the Compass into 20Hz  50Hz  and 800Hz synchronous signal. And we analyzed the precision of time and frequency. To conclude  the uncertainty of system absolute time is less than 100ns  the uncertainty of system synchronous signals is less than 20ns. This system is easy and flexible for use  stable and reliable in performance. 2010 IEEE.   Real-time quality control on a smart camera (EI CONFERENCE) 会议论文 ICO20: Optical Information Processing, August 21, 2005 - August 26, 2005, Changchun, China Xiao C.; Zhou H.; Li G.; Hao Z. 收藏  |  浏览/下载：20/0  |  提交时间：2013/03/25 A smart camera is composed of a video sensing  high-level video processing  communication and other affiliations within a single device. Such cameras are very important devices in quality control systems. This paper presents a prototyping development of a smart camera for quality control. The smart camera is divided to four parts: a CMOS sensor  a digital signal processor (DSP)  a CPLD and a display device. In order to improving the processing speed  low-level and high-level video processing algorithms are discussed to the embedded DSP-based platforms. The algorithms can quickly and automatic detect productions' quality defaults. All algorithms are tested under a Matlab-based prototyping implementation and migrated to the smart camera. The smart camera prototype automatic processes the video data and streams the results of the video data to the display devices and control devices. Control signals are send to produce-line to adjust the producing state within the required real-time constrains.   Design and DSP implementation of star image acquisition and Star point fast acquiring tracking (EI CONFERENCE) 会议论文 2nd International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optical Test and Measurement Technology and Equipment, November 2, 2005 - November 5, 2005, Zian, China Zhou G.; Wang X.; Hao Z. 收藏  |  浏览/下载：17/0  |  提交时间：2013/03/25 Star sensor is a special high accuracy photoelectric sensor. Attitude acquisition time is an important function index of star sensor. In this paper  the design target is to acquire 10 samples per second dynamic performance. On the basis of analyzing CCD signals timing and star image processing  a new design and a special parallel architecture for improving star image processing are presented in this paper. In the design  the operation moving the data in expanded windows including the star to the on-chip memory of DSP is arranged in the invalid period of CCD frame signal. During the CCD saving the star image to memory  DSP processes the data in the on-chip memory. This parallelism greatly improves the efficiency of processing. The scheme proposed here results in enormous savings of memory normally required. In the scheme  DSP HOLD mode and CPLD technology are used to make a shared memory between CCD and DSP. The efficiency of processing is discussed in numerical tests. Only in 3.5ms is acquired the five lightest stars in the star acquisition stage. In 43us  the data in five expanded windows including stars are moved into the internal memory of DSP  and in 1.6ms  five star coordinates are achieved in the star tracking stage.