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浏览/检索结果: 共16条，第1-10条 帮助 限定条件 发表日期：2016     已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择作者升序作者降序题名升序题名降序发表日期升序发表日期降序提交时间升序提交时间降序 An Efficient and Effective Performance Estimation Method for DSE 会议论文 台湾新竹, 2016-04 作者:  Lin C(林忱) 收藏  |  浏览/下载：7/0  |  提交时间：2016/06/17 A New Binary-Halved Clustering Method and ERT Processor for ASSR System 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 5, 页码: 1871-1884 作者:  Chou, Chih-Hung;  Kuan, Ta-Wen;  Barma, Shovan;  Chen, Bo-Wei;  Ji, Wen 收藏  |  浏览/下载：15/0  |  提交时间：2019/12/13 Automatic speech-speaker recognition (ASSR)  binary-halved clustering (BHC)  configurable processing element (CPE)  extraction  recognition  and training (ERT)  multichannel router (MCR)  multifeedback shift register (MFSR)   Fixed-Point Computing Element Design for Transcendental Functions and Primary Operations in Speech Processing 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 5, 页码: 1993-1997 作者:  Chang, Chung-Hsien;  Chen, Shi-Huang;  Chen, Bo-Wei;  Ji, Wen;  Bharanitharan, K. 收藏  |  浏览/下载：19/0  |  提交时间：2019/12/13 Fixed-point system  iterative design  speech processing   VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 3, 页码: 858-870 作者:  Wang, Ying 收藏  |  浏览/下载：19/0  |  提交时间：2019/12/13 Cache design  fault tolerant  multi-V-dd  near-threshold voltage (NTV)  nonuniform cache access (NUCA)   FH-OAOS: A Fast Four-Step Heuristic for Obstacle-Avoiding Octilinear Steiner Tree Construction 期刊论文 ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2016, 卷号: 21 作者:  Huang, Xing;  Guo, Wenzhong;  Liu, Genggeng;  Chen, Guolong 收藏  |  浏览/下载：4/0  |  提交时间：2019/11/21 router  Octilinear architecture  obstacle  Steiner tree  VLSI design   An Adaptive Hybrid Genetic Algorithm for VLSI Standard Cell Placement Problem 会议论文 作者:  Chen, Xiongfeng;  Lin, Geng;  Chen, Jianli;  Zhu, Wenxing 收藏  |  浏览/下载：10/0  |  提交时间：2019/11/21 very large scale integration (VLSI) physical design  global exploration  local exploitation  standard cell placemen  adaptive hybrid genetic algorithm   Exploring Main Memory Design Based on Racetrack Memory Technology 其他 2016-01-01 Hu, Qingda; Sung, Guangyu; Shu, Jiwu; Zhang, Chao 收藏  |  浏览/下载：4/0  |  提交时间：2017/12/03 Main Memory  Racetrack  Shifts  Performance  Energy   FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA Flow 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016 Chen, Yao; Gurumani, Swathi T.; Liang, Yun; Li, Guofeng; Guo, Donghui; Rupnow, Kyle; Chen, Deming 收藏  |  浏览/下载：3/0  |  提交时间：2017/12/03 CUDA  high-level synthesis (HLS)  network-on-chip (NoC)  parallel languages  CACHE-COHERENCE   Hardware-oriented adaptive multi-resolution motion estimation algorithm and its VLSI architecture 其他 2016-01-01 Xiang, Guoqing; Jia, Huizhu; Liu, Jie; Li, Yuan; Xie, Xiaodong 收藏  |  浏览/下载：4/0  |  提交时间：2017/12/03 Deep understanding of random telegraph noise (RTN) effects on SRAM stability 其他 2016-01-01 Mao, Dongyuan; Guo, Shaofeng; Wang, Runsheng; Luo, Mulong; Huang, Ru 收藏  |  浏览/下载：5/0  |  提交时间：2017/12/03