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长春光学精密机械与物... [1]
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会议论文 [1]
发表日期
2012 [1]
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发表日期:2012
内容类型:会议论文
专题:长春光学精密机械与物理研究所
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Design of high speed and parallel compression system used in the big area CCD of high frame frequency (EI CONFERENCE)
会议论文
2011 International Conference on Precision Engineering and Non-Traditional Machining, PENTM 2011, December 9, 2011 - December 11, 2011, Xi'an, China
Liu Y.-Y.
;
Gao Y.-H.
;
Li G.-N.
;
Wang W.-H.
;
Zhang R.-F.
;
Jin L.-X.
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浏览/下载:48/0
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提交时间:2013/03/25
According to the area CCD camera of characteristics
such as high resolution capacity and high frame frequency
this paper puts forward a high speed and parallel image compression system of high integration degree. Firstly
according to the work principle of the area CCD
FPGA is adopted to realize the timing driving and multichannel and parallel analog signal handling to raise the export frame frequency of the area CCD. Secondly
with an image compression scheme based on FPGA embedded processor MicroBlaze and ADV212 compression chip
real time image compression and the high speed area CCD are realized. Finally
by detecting the analog signal of the area CCD output
the real time compression of the big area CCD image is carried out in different compression ratios and the compression performance is analyzed. Experiment result shows that this scheme can realize real time image compression with the biggest data rate of 520Mbps. When compression bit ratio is 0.15
the signal-to-noise ratio of peak value can reach 36 dB. Image collection and image compression are integrated
which reduces the data transmission between them and improves systematic integration degree.
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