基于FPGA与DSP的SIFT特征点检测与匹配方法研究

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题名	基于FPGA与DSP的SIFT特征点检测与匹配方法研究
作者	肖晗
学位类别	工学博士
答辩日期	2011-05-27
授予单位	中国科学院研究生院
授予地点	中国科学院自动化研究所
导师	原魁
关键词	FPGA DSP SIFT特征点嵌入式系统机器视觉硬件计算 FPGA DSP SIFT keypoints embedded system machine vision hardware computation
其他题名	Research on the Detection and Matching Technique of SIFT Keypoints based on FPGA and DSP
学位专业	控制理论与控制工程
中文摘要	SIFT算法是计算机视觉中一种著名的特征点检测与匹配算法，在目标识别、立体视觉等领域具有重要的应用价值。然而，SIFT算法的计算复杂度很高，用纯软件实现难以满足实时应用的需求。本文在课题组自行开发的图像采集处理卡上，通过FPGA与DSP的分工协作利用硬件并行方式实现了SIFT算法的实时计算。本文的工作可以概括如下： 1、在对本课题组图像采集处理卡的结构和工作原理进行理解和改进的基础上，结合硬件系统工作特点对SIFT特征点检测与匹配算法的原理进行了剖析，给出了利用FPGA和DSP技术实现SIFT算法的硬件和软件体系结构； 2、在对利用FPGA实现SIFT特征点检测的现有成果进行分析的基础上，结合硬件工作特点，对SIFT特征点检测算法进行了改进，其中包括：采用较小高斯滤波核等效代替图像增大运算以降低计算量；合理选择尺度层次以兼顾特征点的数量和抗噪声性能；采用“面双法”（面密度插值法和双重极值点约束）检测特征点以提高特征点的尺度不变性和定点数计算精度；取消极值点的“精确定位”以便于硬件实现。在硬件方面，设计了一种高效率的电路计算方案，该方案以更为合理的结构能够采用足够多的定点数位数，从而保证了计算精度。实验结果证明了算法改进和硬件实现的有效性。 3、对SIFT算法中的特征描述向量提取和匹配方法行了深入研究，面向FPGA+DSP实现提出了一种基于72维特征描述向量的改进算法：特征描述向量由128维降至72维，以节约存储空间，减少匹配计算量；合理运用锥形函数和三角隶属度函数进行加权，以提高描述向量对特征点位置偏移的鲁棒性；采用∞-范数定义描述向量的长度和距离，以减少计算时间。设计实现了一种通过DSP调用FPGA模块的实现方案，利用FPGA内的流水线结构实现改进算法的较大计算量，有效提高了计算速度。 4、分别以模型飞机识别问题和双目视觉中的特征点匹配问题为应用背景进行了实验，实验结果证实了本文所提基于FPGA和DSP技术的SIFT特征点检测和匹配实现方案的有效性、合理性和实用性。
英文摘要	SIFT, short for Scale Invariant Feature Transform, is a well-known algorithm in computer vision for keypoint detection and matching, and has great application value in such fields as object recognition, stereo vision and so on. However, due to its high computational complexity, SIFT can hardly satisfy the requirement of real-time applications when implemented by pure software. This paper accomplishes real-time computation of SIFT algorithm through hardware and parallel computing derived from the division of work and cooperation between an FPGA chip and a DSP chip which are embedded in an image gathering and processing card developed by our research team. The content of this paper can be summarized as follows: (1) Based on the comprehension and improvement on the structure and working principles of the image gathering and processing card, the fundamentals of the detection and matching algorithm of SIFT keypoints are analyzed in detail with the working characteristics of the hardware system in consideration, and the system structures of hardware and software are proposed for the implementation of SIFT algorithm with FPGA and DSP technology. (2) Based on the analysis of existing achievements of SIFT keypoint detection implemented on FPGA, the algorithm of detecting SIFT keypoints is modified to accommodate the working characteristics of hardware. The modifications include: adopting small Gaussian kernels instead of expanding the size of the image to reduce the calculated amount; choosing scale levels properly to balance the number and noise-robustness of keypoints; taking the ADIDER (Area Density Interpolation and Dual Extremum Restriction) method in the keypoint detection procedure to improve the scale invariance of keypoints and to raise the calculation precision of fixed-point numbers; canceling the “accurate localization” of keypoints to facilitate hardware implementation. With respect to hardware, a highly efficient circuit computation scheme is designed with a more reasonable structure, making it possible to take enough bits in fixed-point numbers so as to guarantee computation accuracy. Experimental results have demonstrated the effectiveness of the improvement measures on the algorithm and the validity of the hardware implementation. (3) The method of extracting and matching the descriptors of SIFT keypoints is lucubrated, and an ameliorated algorithm catering for the FPGA+DSP terrace is proposed based on a 72-dimension keypoint descriptor: redu...
语种	中文
其他标识符	200818014628020
内容类型	学位论文
源URL	[http://ir.ia.ac.cn/handle/173211/6356]
专题	毕业生_博士学位论文
推荐引用方式 GB/T 7714	肖晗. 基于FPGA与DSP的SIFT特征点检测与匹配方法研究[D]. 中国科学院自动化研究所. 中国科学院研究生院. 2011.