Circulating current analysis and robust droop multiple loop control method for parallel inverters using resistive output impedance | |
Chen, Yandong; Luo, An; Long, Jigen; Peng, Ziqiang; Zhang, Qinghai; L眉, Zhipeng | |
刊名 | Proceedings of the CSEE
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2013 | |
卷号 | Vol.33 No.18页码:18-29 |
ISSN号 | 0258-8013 |
URL标识 | 查看原文 |
公开日期 | [db:dc_date_available] |
内容类型 | 期刊论文 |
URI标识 | http://www.corc.org.cn/handle/1471x/6500647 |
专题 | 湖南大学 |
作者单位 | 1.College of Electrical and Information Engineering, Hunan University, Changsha 410082, Hunan Province, China 2.China Electric Power Research Institute, Haidian District, Beijing 100192, China |
推荐引用方式 GB/T 7714 | Chen, Yandong,Luo, An,Long, Jigen,et al. Circulating current analysis and robust droop multiple loop control method for parallel inverters using resistive output impedance[J]. Proceedings of the CSEE,2013,Vol.33 No.18:18-29. |
APA | Chen, Yandong,Luo, An,Long, Jigen,Peng, Ziqiang,Zhang, Qinghai,&L眉, Zhipeng.(2013).Circulating current analysis and robust droop multiple loop control method for parallel inverters using resistive output impedance.Proceedings of the CSEE,Vol.33 No.18,18-29. |
MLA | Chen, Yandong,et al."Circulating current analysis and robust droop multiple loop control method for parallel inverters using resistive output impedance".Proceedings of the CSEE Vol.33 No.18(2013):18-29. |
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