Optimization of 40-nm Node Epitaxial Diode Array for Phase-Change Memory Application

	Optimization of 40-nm Node Epitaxial Diode Array for Phase-Change Memory Application
	Liu, Y ; Song, ZT ; Liu, B ; Wu, GP ; Chen, HP ; Zhang, C ; Wang, LH ; Feng, SL
刊名	IEEE ELECTRON DEVICE LETTERS
	2012
卷号	33 期号:8 页码:1192-1194
关键词	Buried n(+) layer (BNL) series resistance epitaxial (EPI) diode array numerical model phase-change memory (PCM)
ISSN号	0741-3106
通讯作者	Liu, Y (reprint author), Chinese Acad Sci, State Key Lab Funct Mat Informat, Shanghai Inst Microsyst & Informat Technol, Shanghai 200050, Peoples R China.
中文摘要	A numerical model of an epitaxial (EPI) diode array for next-generation memory device application, including phase-change memory, has been presented. According to a diode array process scheme and technology computer-aided design (TCAD) simulation results,
学科主题	Engineering
收录类别	2012SCI-079
原文出处	10.1109/LED.2012.2199733
语种	英语
公开日期	2013-04-17
内容类型	期刊论文
源URL	[http://ir.sim.ac.cn/handle/331004/114809]
专题	上海微系统与信息技术研究所_功能材料与器件_期刊论文
推荐引用方式 GB/T 7714	Liu, Y,Song, ZT,Liu, B,et al. Optimization of 40-nm Node Epitaxial Diode Array for Phase-Change Memory Application[J]. IEEE ELECTRON DEVICE LETTERS,2012,33(8):1192-1194.
APA	Liu, Y.,Song, ZT.,Liu, B.,Wu, GP.,Chen, HP.,...&Feng, SL.(2012).Optimization of 40-nm Node Epitaxial Diode Array for Phase-Change Memory Application.IEEE ELECTRON DEVICE LETTERS,33(8),1192-1194.
MLA	Liu, Y,et al."Optimization of 40-nm Node Epitaxial Diode Array for Phase-Change Memory Application".IEEE ELECTRON DEVICE LETTERS 33.8(2012):1192-1194.