A Fast SIFT Parallel Match Algorithm Combined with Pipeline Technology on Multi-core DSP | |
Wang, Quan | |
2017 | |
会议名称 | PROCEEDINGS OF 2017 3RD IEEE INTERNATIONAL CONFERENCE ON COMPUTER AND COMMUNICATIONS (ICCC) |
会议日期 | 2017-01-01 |
关键词 | DSP parallel architecture pipeline technology hybrid scheduling grid quantization |
页码 | 2465-2469 |
收录类别 | CPCI-S |
URL标识 | 查看原文 |
WOS记录号 | WOS:000440623602104 |
内容类型 | 会议论文 |
URI标识 | http://www.corc.org.cn/handle/1471x/5943324 |
专题 | 北京航空航天大学 |
推荐引用方式 GB/T 7714 | Wang, Quan. A Fast SIFT Parallel Match Algorithm Combined with Pipeline Technology on Multi-core DSP[C]. 见:PROCEEDINGS OF 2017 3RD IEEE INTERNATIONAL CONFERENCE ON COMPUTER AND COMMUNICATIONS (ICCC). 2017-01-01. |
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