| A hardware-efficient parallel architecture for real-time blob analysis based on run-length code | |
| Li, Bingjie; Zhang, Cunguang; Li, Bo; Jiang, Hongxu; Xu, Qizhi | |
| 刊名 | JOURNAL OF REAL-TIME IMAGE PROCESSING
 |
| 2018 | |
| 卷号 | 15页码:657-672 |
| 关键词 | Blob analysis Parallelization Convex hull calculation FPGA |
| ISSN号 | 1861-8200 |
| DOI | 10.1007/s11554-017-0709-0 |
| URL标识 | 查看原文 |
| 收录类别 | SCIE |
| WOS记录号 | WOS:000448821700016 |
| 内容类型 | 期刊论文 |
| URI标识 | http://www.corc.org.cn/handle/1471x/5929383 |
| 专题 | 北京航空航天大学 |
| 推荐引用方式 GB/T 7714 | Li, Bingjie,Zhang, Cunguang,Li, Bo,et al. A hardware-efficient parallel architecture for real-time blob analysis based on run-length code[J]. JOURNAL OF REAL-TIME IMAGE PROCESSING,2018,15:657-672. |
| APA | Li, Bingjie,Zhang, Cunguang,Li, Bo,Jiang, Hongxu,&Xu, Qizhi.(2018).A hardware-efficient parallel architecture for real-time blob analysis based on run-length code.JOURNAL OF REAL-TIME IMAGE PROCESSING,15,657-672. |
| MLA | Li, Bingjie,et al."A hardware-efficient parallel architecture for real-time blob analysis based on run-length code".JOURNAL OF REAL-TIME IMAGE PROCESSING 15(2018):657-672. |
| 个性服务 |
| 查看访问统计 |
| 相关权益政策 |
| 暂无数据 |
| 收藏/分享 |
除非特别说明，本系统中所有内容都受版权保护，并保留所有权利。
修改评论