Methods and structures for forming integrated semiconductor structures
SADAKA, MARIAM; IONUT, RADU
2015-05-19
著作权人SOITEC
专利号US9034727
国家美国
文献子类授权发明
其他题名Methods and structures for forming integrated semiconductor structures
英文摘要The invention provides methods and structures for fabricating a semiconductor structure and particularly for forming a semiconductor structure with improved planarity for achieving a bonded semiconductor structure comprising a processed semiconductor structure and a number of bonded semiconductor layers. Methods for forming semiconductor structures include forming a dielectric layer over a non-planar surface of a processed semiconductor structure, planarizing a surface of the dielectric layer on a side thereof opposite the processed semiconductor structure, and attaching a semiconductor structure to the planarized surface of the dielectric layer. Semiconductor structures include a dielectric layer overlaying a non-planar surface of a processed semiconductor structure, and a masking layer overlaying the dielectric layer on a side thereof opposite the processed semiconductor structure. The masking layer includes a plurality of mask openings over conductive regions of the non-planar surface of the processed semiconductor structure.
公开日期2015-05-19
申请日期2011-01-04
状态授权
内容类型专利
源URL[http://ir.opt.ac.cn/handle/181661/37491]  
专题半导体激光器专利数据库
作者单位SOITEC
推荐引用方式
GB/T 7714
SADAKA, MARIAM,IONUT, RADU. Methods and structures for forming integrated semiconductor structures. US9034727. 2015-05-19.
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