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	Transactional memory architecture supporting I/O operations within transactions
	Liu, Yi; Li, Ming-Xiu; Zhang, Xin; Li, He; Jiao, Lin; Qian, De-Pei
刊名	Tien Tzu Hsueh Pao/Acta Electronica Sinica
	2009
卷号	37期号:2页码:248-252
关键词	Benchmark applications Buffer overflows Hardware and software Hardware transactional memory It supports Multi-core processor Programming models Transactional memory
ISSN号	0372-2112
URL标识	查看原文
内容类型	期刊论文
URI标识	http://www.corc.org.cn/handle/1471x/4819469
专题	西安交通大学
推荐引用方式 GB/T 7714	Liu, Yi,Li, Ming-Xiu,Zhang, Xin,et al. Transactional memory architecture supporting I/O operations within transactions[J]. Tien Tzu Hsueh Pao/Acta Electronica Sinica,2009,37(2):248-252.
APA	Liu, Yi,Li, Ming-Xiu,Zhang, Xin,Li, He,Jiao, Lin,&Qian, De-Pei.(2009).Transactional memory architecture supporting I/O operations within transactions.Tien Tzu Hsueh Pao/Acta Electronica Sinica,37(2),248-252.
MLA	Liu, Yi,et al."Transactional memory architecture supporting I/O operations within transactions".Tien Tzu Hsueh Pao/Acta Electronica Sinica 37.2(2009):248-252.

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