| An Analysis of the PLLs With Secondary Control Path | |
| Golestan, Saeed; Ramezani, Malek; Guerrero, Josep M. | |
| 刊名 | IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
 |
| 2014 | |
| 卷号 | 61期号:9页码:4824-4828 |
| 关键词 | Dynamic performance phase-locked loop (PLL) synchronization |
| DOI | 10.1109/TIE.2013.2289904 |
| URL标识 | 查看原文 |
| 内容类型 | 期刊论文 |
| URI标识 | http://www.corc.org.cn/handle/1471x/4794134 |
| 专题 | 山东大学 |
| 作者单位 | 1.Islamic Azad Univ, Abadan Branch, Dept Elect Engn, Abadan 6317836531, Iran. 2.Aalborg Univ, D |
| 推荐引用方式 GB/T 7714 | Golestan, Saeed,Ramezani, Malek,Guerrero, Josep M.. An Analysis of the PLLs With Secondary Control Path[J]. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS,2014,61(9):4824-4828. |
| APA | Golestan, Saeed,Ramezani, Malek,&Guerrero, Josep M..(2014).An Analysis of the PLLs With Secondary Control Path.IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS,61(9),4824-4828. |
| MLA | Golestan, Saeed,et al."An Analysis of the PLLs With Secondary Control Path".IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 61.9(2014):4824-4828. |
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