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	Concurrent error detection adder based on two paths output computation
	Khedhiri, Chiraz; Karmani, Mouna; Hamdi, Belgacem; Man, Ka Lok
	2011
关键词	Concurrent error detection Dual modular redundancy Full adders Standard CMOS Style designs Transient faults Transistor count Two paths
期号	[db:dc_citation_issue]
DOI	[db:dc_identifier_doi]
页码	27-32
会议录	Proceedings - 9th IEEE International Symposium on Parallel and Distributed Processing with Applications Workshops, ISPAW 2011 - ICASE 2011, SGH 2011, GSDP 2011
URL标识	查看原文
ISSN号	9780769544298
WOS记录号	[DB:DC_IDENTIFIER_WOSID]
内容类型	会议论文
URI标识	http://www.corc.org.cn/handle/1471x/4487734
专题	西安交通大学
推荐引用方式 GB/T 7714	Khedhiri, Chiraz,Karmani, Mouna,Hamdi, Belgacem,et al. Concurrent error detection adder based on two paths output computation[C]. 见:.

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