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	Hierarchical and Parallel Pipelined Heterogeneous SoC for Embedded Vision Processing
	Zhang, Bin; Zhao, Chen; Mei, Kuizhi; Zhao, Jizhong; Zheng, Nanning
刊名	IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY
	2018
卷号	28页码:1434-1444
关键词	3D position estimation application-specific instruction set processor (ASIP) system on chip (SoC) reconfigurable embedded vision system
ISSN号	1051-8215
URL标识	查看原文
内容类型	期刊论文
URI标识	http://www.corc.org.cn/handle/1471x/2920842
专题	西安交通大学
推荐引用方式 GB/T 7714	Zhang, Bin,Zhao, Chen,Mei, Kuizhi,et al. Hierarchical and Parallel Pipelined Heterogeneous SoC for Embedded Vision Processing[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY,2018,28:1434-1444.
APA	Zhang, Bin,Zhao, Chen,Mei, Kuizhi,Zhao, Jizhong,&Zheng, Nanning.(2018).Hierarchical and Parallel Pipelined Heterogeneous SoC for Embedded Vision Processing.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY,28,1434-1444.
MLA	Zhang, Bin,et al."Hierarchical and Parallel Pipelined Heterogeneous SoC for Embedded Vision Processing".IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY 28(2018):1434-1444.

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