堆叠纳米线MOS晶体管制作方法
殷华湘; 秦长亮; 付作振; 马小龙; 陈大鹏
2018-02-13
著作权人中国科学院微电子研究所
专利号US9892912
国家美国
文献子类发明专利
英文摘要

Methods of manufacturing stacked nanowires MOS transistors are disclosed. In one aspect, the method includes forming a plurality of fins along a first direction on a substrate. The method also includes forming stack of nanowires constituted of a plurality of nanowires in each of the fins. The method also includes forming a gate stack along a second direction in the stack of nanowires, the gate stack surrounding the stack of nanowires. The method also includes forming source/drain regions at both sides of the gate stack, the nanowires between the respective source/drain regions constituting a channel region. A stack of nanowires may be formed by a plurality of etching back, laterally etching a trench and filling the trench. The laterally etching process includes isotropic dry etching having an internally tangent and lateral etching, and a wet etching which selectively etches along respective crystallographic directions.

公开日期2015-08-13
申请日期2013-08-06
语种中文
内容类型专利
源URL[http://159.226.55.107/handle/172511/18887]  
专题微电子研究所_集成电路先导工艺研发中心
作者单位中国科学院微电子研究所
推荐引用方式
GB/T 7714
殷华湘,秦长亮,付作振,等. 堆叠纳米线MOS晶体管制作方法. US9892912. 2018-02-13.
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