A Robust Asynchronous 16×16-Bit Subthreshold Multiplier Using SAPTL Technique

	A Robust Asynchronous 16×16-Bit Subthreshold Multiplier Using SAPTL Technique
	Wu YP(吴玉平); Zhang Q(张琦); Chen L(陈岚); Zhang XL(张学连)
刊名	Microelectronics Reliability
	2018-08-31
文献子类	期刊论文
内容类型	期刊论文
源URL	[http://159.226.55.107/handle/172511/19043]
专题	微电子研究所_EDA中心
推荐引用方式 GB/T 7714	Wu YP,Zhang Q,Chen L,et al. A Robust Asynchronous 16×16-Bit Subthreshold Multiplier Using SAPTL Technique[J]. Microelectronics Reliability,2018.
APA	吴玉平,张琦,陈岚,&张学连.(2018).A Robust Asynchronous 16×16-Bit Subthreshold Multiplier Using SAPTL Technique.Microelectronics Reliability.
MLA	吴玉平,et al."A Robust Asynchronous 16×16-Bit Subthreshold Multiplier Using SAPTL Technique".Microelectronics Reliability (2018).