System on programmable chip development system | |
Lin, Fei-Yu1,2; Jiao, Xi-Xiang1,2; Guo, Yu-Hui1; Zhang, Jian-Chuan1,2; Qiao, Wei-Ming1; Jing, Lan1; Wang, Yan-Yu1; Ma, Yun-Hai1 | |
2010 | |
会议地点 | Wuhan, Hubei, China |
卷号 | 1 |
DOI | 10.1109/ETCS.2010.389 |
页码 | 471-474 |
英文摘要 | The embedded systems have received increasing research interest in recent years due to its wide usage. This paper presents system on programmable chip(SOPC),a new technology in the embedded systems,to support the development of design projects for undergraduate students in their electrical and computer engineering curriculum. FPGA-based SOPC development board with reduced instruction set computer (RISC) processor cores,a top-down design approach with FPGA computer-aided design tools, a C compiler for the RISC soft-processor core and a large FPGA with on-chip memory are used for a wide variety of student design projects. The course, which includes both software and hardware, can meet the different needs of students from different professional backgrounds and contribute to a better understanding between electrical engineering and computer science and therefore can increase the competitiveness of students. © 2010 IEEE. |
会议录 | 2nd International Workshop on Education Technology and Computer Science, ETCS 2010 |
会议录出版者 | IEEE Computer Society |
内容类型 | 会议论文 |
源URL | [http://119.78.100.186/handle/113462/63919] |
专题 | 中国科学院近代物理研究所 |
作者单位 | 1.Institute of Modern Physics, Chinese Academy of Sciences, Lanzhou, China 2.Graduate School, Chinese Academy of Sciences, Beijing, China |
推荐引用方式 GB/T 7714 | Lin, Fei-Yu,Jiao, Xi-Xiang,Guo, Yu-Hui,et al. System on programmable chip development system[C]. 见:. Wuhan, Hubei, China. |
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