Tiles: A New Language Mechanism for Heterogeneous Parallelism | |
Chen, Yifeng ; Cui, Xiang ; Mei, Hong | |
刊名 | ACM SIGPLAN NOTICES |
2015 | |
关键词 | Parallel Programming |
DOI | 10.1145/2688500.2688555 |
英文摘要 | This paper studies the essence of heterogeneity from the perspective of language mechanism design. The proposed mechanism, called tiles, is a program construct that bridges two relative levels of computation: an outer level of source data in larger, slower or more distributed memory and an inner level of data blocks in smaller, faster or more localized memory.; SCI(E); EI; ARTICLE; cyf@pku.edu.cn; cuixiang08@pku.edu.cn; meih@pku.edu.cn; 8; 287-288; 50 |
语种 | 英语 |
内容类型 | 期刊论文 |
源URL | [http://ir.pku.edu.cn/handle/20.500.11897/423508] |
专题 | 信息科学技术学院 |
推荐引用方式 GB/T 7714 | Chen, Yifeng,Cui, Xiang,Mei, Hong. Tiles: A New Language Mechanism for Heterogeneous Parallelism[J]. ACM SIGPLAN NOTICES,2015. |
APA | Chen, Yifeng,Cui, Xiang,&Mei, Hong.(2015).Tiles: A New Language Mechanism for Heterogeneous Parallelism.ACM SIGPLAN NOTICES. |
MLA | Chen, Yifeng,et al."Tiles: A New Language Mechanism for Heterogeneous Parallelism".ACM SIGPLAN NOTICES (2015). |
个性服务 |
查看访问统计 |
相关权益政策 |
暂无数据 |
收藏/分享 |
除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。
修改评论