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Development of high voltage thin film SOI device with linearly doped drift region
Zhang, S.D. ; Han, R.Q. ; Tommy, L. ; Johnny, S.
刊名tien tzu hsueh paoacta electronica sinica
2001
英文摘要Principle and method for designing high voltage thin film SOI devices with linearly doped drift region are given. LDMOS transistors are fabricated on the SOI wafers with Si film of 0.15??m and buried oxide of 2??m. The dependence of breakdown voltages of the thin film SOI devices on the concentration gradient in the linearly doped drift region is experimentally investigated. Based on the optimization of the impurity dose in drift region, the breakdown voltage over 612 V is observed in the SOI LDMOS transistors with 50??m drift region.; EI; 0; 2; 164-167; 29
语种英语
内容类型期刊论文
源URL[http://ir.pku.edu.cn/handle/20.500.11897/408355]  
专题信息科学技术学院
推荐引用方式
GB/T 7714
Zhang, S.D.,Han, R.Q.,Tommy, L.,et al. Development of high voltage thin film SOI device with linearly doped drift region[J]. tien tzu hsueh paoacta electronica sinica,2001.
APA Zhang, S.D.,Han, R.Q.,Tommy, L.,&Johnny, S..(2001).Development of high voltage thin film SOI device with linearly doped drift region.tien tzu hsueh paoacta electronica sinica.
MLA Zhang, S.D.,et al."Development of high voltage thin film SOI device with linearly doped drift region".tien tzu hsueh paoacta electronica sinica (2001).
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