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	N channel SOI Schottky barrier tunneling transistors
	Liu, XY ; Luo, K ; Du, G ; Sun, L ; Kang, JF ; Han, RQ
	2001
关键词	FIELD-EFFECT TRANSISTORS NUMERICAL-SIMULATION
英文摘要	n channel Schottky barrier tunneling-effect transistor on SOI substrate is simulated by ensemble MC program combined with the consistent solution of the Poisson's equation and the Schordinger's equation. The n channel SOI SBTT with 100nm channel lengths is fabricated by typical CMOS technology. The gate pattern is developed by image transfer of an edge-defined spacer. The CoSi2 is used for S/D regions directly. with out S/D implantation. The I-V characteristics is measured and compared to the simulation results.; http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000174745900127&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=8e1609b174ce4e31116a60747a720701 ; Engineering, Electrical & Electronic; Materials Science, Multidisciplinary; Physics, Applied; Physics, Condensed Matter; CPCI-S(ISTP); 0
语种	英语
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/293951]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Liu, XY,Luo, K,Du, G,et al. N channel SOI Schottky barrier tunneling transistors. 2001-01-01.

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