QQ客服 官方微博 反馈留言

	A lithography independent gate definition technology for fabricating sub-100nm devices
	Zhang, SD ; Han, RQ ; Liu, XY ; Guan, XD ; Li, T ; Zhang, DC
	2001
关键词	50-NM
英文摘要	In this paper, a lithography independent gate definition technology to fabricate sub-100nm device is proposed and experimentally demonstrated. In the proposed technology, the gate of the device is formed by a spacer over a step next to the gate region. The height of the gate is thus determined by the step height and the channel is defined by the spacer width. Thus, the channel length is defined by the thickness of polysilicon layer, which can be precisely controlled. Experimental results reveal that the resulting gate length is about 75 to 85 percent of the deposited film thickness. SEM photographs show that sub-50nm lines can be formed using this method. Transistors fabricated using the new method have been characterized and excellent I-V characteristics are demonstrated.; Engineering, Electrical & Electronic; Optics; Physics, Applied; CPCI-S(ISTP); 0
语种	英语
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/293943]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Zhang, SD,Han, RQ,Liu, XY,et al. A lithography independent gate definition technology for fabricating sub-100nm devices. 2001-01-01.

个性服务

查看访问统计

相关权益政策

暂无数据

收藏/分享

除非特别说明，本系统中所有内容都受版权保护，并保留所有权利。