An improved low power CMOS readout circuit for focal plane array | |
Chen, ZG ; Li, XY ; Ji, LJ ; Han, JZ ; Yu, SG | |
2001 | |
英文摘要 | An improved low power CMOS snapshot readout structure called OESCA (Odd-Even Snapshot Charge Amplifier) for focal plane array (FPA) is presented in this paper. Using two low power charge amplifiers as column readout circuit (one is for the odd-row readout and the other is for the even-row), this structure not only can eliminate the influence of column bus parasitic capacitance, but also can save 15% power dissipation of the column readout stage. The pixel circuit includes only three NMOSFETs. Thus, it is very suitable for large-format small-pixel lower-power readout circuit. An experimental 64 X 64 OESCA chip has been fabricated with 1.2-mum Double-Poly Double-Metal (DPDM) n-well CMOS technology. The charge handling capacity is 10.37pC with pixel size 50 X 50mum(2). A description of the readout circuit structure, pixel circuit, operation principle is given in detail. Both excellent simulation results and experimental results of the fabricated OESCA readout chip are presented.; http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000176369900203&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=8e1609b174ce4e31116a60747a720701 ; Computer Science, Information Systems; Engineering, Electrical & Electronic; Telecommunications; CPCI-S(ISTP); 2 |
语种 | 英语 |
内容类型 | 其他 |
源URL | [http://ir.pku.edu.cn/handle/20.500.11897/293921] ![]() |
专题 | 信息科学技术学院 |
推荐引用方式 GB/T 7714 | Chen, ZG,Li, XY,Ji, LJ,et al. An improved low power CMOS readout circuit for focal plane array. 2001-01-01. |
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