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	A Jitter Measurement Circuit Based On Dual Resolution Vernier Oscillator
	Tang, Wei ; Feng, Jianhua ; Lee, Chunglen
	2009
关键词	timing jitter on-chip vernier oscillator jitter measurement
英文摘要	This paper presents a new on-chip jitter measurement circuit based on a dual vernier oscillator (VO) structure. The new structure measures the jitter with a low resolution VO first and then with a high resolution VO, thus greatly expanding the measurement range of the jitter and reducing the test time. The oscillators are implemented with differential digital controlled delay elements, whose oscillation periods can be precisely controlled The circuit has been implemented and verified with the SMIC 0.18 mu m technology and has been shown to have the ability of measuring jitters in the pico-second range.; http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000275924100303&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=8e1609b174ce4e31116a60747a720701 ; Engineering, Electrical & Electronic; EI; CPCI-S(ISTP); 1
语种	英语
DOI标识	10.1109/ASICON.2009.5351194
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/260952]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Tang, Wei,Feng, Jianhua,Lee, Chunglen. A Jitter Measurement Circuit Based On Dual Resolution Vernier Oscillator. 2009-01-01.

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