| A high-speed memory interface architecture for MPEG2 video decoder | |
| Jia Xiaoling[1]; Chen Guanghua[2]; Zou Weiyu[3] | |
| 2005 | |
| 会议名称 | Proceedings of the Seventh IEEE CPMT Conference on High Density Microsystem Design, Packaging and Failure Analysis (HDP'05) |
| 会议日期 | 2005-01-01 |
| 关键词 | video decoder motion compensation SDRAM memory interface |
| 页码 | 538-541 |
| URL标识 | 查看原文 |
| 内容类型 | 会议论文 |
| URI标识 | http://www.corc.org.cn/handle/1471x/2400564 |
| 专题 | 上海大学 |
| 作者单位 | Shanghai Univ, Microelect Res & Design Ctr, Shanghai 200072, Peoples R China. |
| 推荐引用方式 GB/T 7714 | Jia Xiaoling[1],Chen Guanghua[2],Zou Weiyu[3]. A high-speed memory interface architecture for MPEG2 video decoder[C]. 见:Proceedings of the Seventh IEEE CPMT Conference on High Density Microsystem Design, Packaging and Failure Analysis (HDP'05). 2005-01-01. |
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