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	A New 10T SRAM Cell with Improved Read/Write Margin and no Half Select Disturb for Bit-interleaving Architecture
	Zhou,Honggang; Song,Qiang; Tan,Shoubiao; Peng,Chunyu
刊名	INFORMATION TECHNOLOGY APPLICATIONS IN INDUSTRY, PTS 1-4
	2013
卷号	Vol.263-266页码:9-14
关键词	half select problem write stability bit-interleaving
ISSN号	1660-9336
URL标识	查看原文
内容类型	期刊论文
URI标识	http://www.corc.org.cn/handle/1471x/2160219
专题	安徽大学
作者单位	Anhui Univ, Sch Elect & Informat Engn, Hefei 230601, Anhui, Peoples R China
推荐引用方式 GB/T 7714	Zhou,Honggang,Song,Qiang,Tan,Shoubiao,et al. A New 10T SRAM Cell with Improved Read/Write Margin and no Half Select Disturb for Bit-interleaving Architecture[J]. INFORMATION TECHNOLOGY APPLICATIONS IN INDUSTRY, PTS 1-4,2013,Vol.263-266:9-14.
APA	Zhou,Honggang,Song,Qiang,Tan,Shoubiao,&Peng,Chunyu.(2013).A New 10T SRAM Cell with Improved Read/Write Margin and no Half Select Disturb for Bit-interleaving Architecture.INFORMATION TECHNOLOGY APPLICATIONS IN INDUSTRY, PTS 1-4,Vol.263-266,9-14.
MLA	Zhou,Honggang,et al."A New 10T SRAM Cell with Improved Read/Write Margin and no Half Select Disturb for Bit-interleaving Architecture".INFORMATION TECHNOLOGY APPLICATIONS IN INDUSTRY, PTS 1-4 Vol.263-266(2013):9-14.

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