Optimization of Operational Amplifier Settling Time by Adjusting Secondary Poles Based on g(m)/I-D Design

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	Optimization of Operational Amplifier Settling Time by Adjusting Secondary Poles Based on g(m)/I-D Design
	Zhao YH(赵耀宏); Qiao J(乔俊); Wang X(王霄)
	2017
会议名称	12th IEEE International Conference on ASIC (ASICON)
会议日期	October 25-28, 2017
会议地点	Guiyang, PEOPLES R CHINA
页码	230-232
通讯作者	Qiao, Jun
中文摘要	In readout circuits of infrared detectors, the settling time of the operational amplifier is crucial to transfer radiation signals. Hence, this paper proposes an optimization of the sizes of the load transistors pair, M3 and M4 in Figure 1, to improve the transient response. In this design, the amplifier is firstly designed based on g(m)/I-D method to satisfy the required performance. However, this may be not the best solution. Then, the sizes of the load transistors are scanned with the fixed width-to-length (W/L) ratio to guarantee the noise level. The step response experiments are carried out to figure out the best damping factor. Meanwhile, this paper analyzes the influence of the doublet spacing and the secondary pole-to-pole spacing. The initial calculated design has a settling time of 39.8ns @ 12 bit precision, while the settling process compresses to 32.4ns after the adjustment.
收录类别	EI ; CPCI（ISTP）
产权排序	1
会议主办者	IEEE
会议录	2017 IEEE 12TH INTERNATIONAL CONFERENCE ON ASIC (ASICON)
会议录出版者	IEEE
会议录出版地	NEW YORK
语种	英语
ISSN号	2162-7541
ISBN号	978-1-5090-6625-4
WOS记录号	WOS:000426983400058
内容类型	会议论文
源URL	[http://ir.sia.cn/handle/173321/21645]
专题	沈阳自动化研究所_光电信息技术研究室
作者单位	1.Key Laboratory of Opto-Electronic Information Processing, Chinese Academy of Sciences 2.Shenyang Institute of Automation, Chinese Academy of Sciences
推荐引用方式 GB/T 7714	Zhao YH,Qiao J,Wang X. Optimization of Operational Amplifier Settling Time by Adjusting Secondary Poles Based on g(m)/I-D Design[C]. 见:12th IEEE International Conference on ASIC (ASICON). Guiyang, PEOPLES R CHINA. October 25-28, 2017.