Modular Timing Constraints for Delay-Insensitive Systems

	Modular Timing Constraints for Delay-Insensitive Systems
	Park, H; He, AP; Roncken, M; Song, XY; Sutherland, I
刊名	JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY
	2016-01
卷号	31 期号:1 页码:77-106
关键词	self-timed circuit delay-insensitive system model checking timing analysis design pattern
ISSN号	1000-9000
通讯作者	He, AP (reprint author), Lanzhou Univ, Sch Informat Sci & Engn, Lanzhou 730000, Peoples R China.
学科主题	Computer Science
出版地	BEIJING
语种	英语
WOS记录号	WOS:000370489700007
内容类型	期刊论文
源URL	[http://ir.lzu.edu.cn/handle/262010/182778]
专题	信息科学与工程学院_期刊论文
推荐引用方式 GB/T 7714	Park, H,He, AP,Roncken, M,et al. Modular Timing Constraints for Delay-Insensitive Systems[J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,2016,31(1):77-106.
APA	Park, H,He, AP,Roncken, M,Song, XY,&Sutherland, I.(2016).Modular Timing Constraints for Delay-Insensitive Systems.JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,31(1),77-106.
MLA	Park, H,et al."Modular Timing Constraints for Delay-Insensitive Systems".JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 31.1(2016):77-106.