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	Design of data acquisition module based on Compact-RIO
	Zhi, Wang ; Wendong, Xue ; Gang, Liu ; Yongqiang, Hong ; Hong YQ(洪永强)
	2014
关键词	Analog to digital conversion Data acquisition Field programmable gate arrays (FPGA) Signal analysis
英文摘要	Conference Name:2014 International Conference on Information Science, Electronics and Electrical Engineering, ISEEE 2014. Conference Address: Sapporo City, Hokkaido, Japan. Time:April 26, 2014 - April 28, 2014.; Future University Hakodate; IEEE Sapporo Section; Xiamen University; The circuit of the signal acquisition module was designed and accomplished based on 24 high-precision A-E type serial A/D conversion chip ADS1258, employed Xilinx xc3s2000 FPGA as acquisition controller embedded in the chassis of N1 Compact-RIO, and host-programmed by Labview. The module achieved 16 Single-Ended input-channels with up to 23.7kHz (maximum) analog signal acquisition sampling rate. In addition to taking full advantage of ADS1258 on-chip function, the circuit contains single-ended-to-differential part, reference power, voltage isolation and other modules to ensure the accuracy and stability of the data acquisition.
语种	英语
出处	http://dx.doi.org/10.1109/InfoSEEE.2014.6946166
出版者	Institute of Electrical and Electronics Engineers Inc.
内容类型	其他
源URL	[http://dspace.xmu.edu.cn/handle/2288/86304]
专题	物理技术－会议论文
推荐引用方式 GB/T 7714	Zhi, Wang,Wendong, Xue,Gang, Liu,et al. Design of data acquisition module based on Compact-RIO. 2014-01-01.

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