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纳米CMOS电路的应变Si衬底制备技术
陈长春 ; 刘江锋 ; 余本海 ; 戴启润 ; 刘志弘 ; CHEN Chang-chun ; LIU Jiang-feng ; YU Ben-hai ; DAI Qi-run ; LIU Zhi-hong
2010-06-09 ; 2010-06-09
关键词SiGe虚拟衬底 应变Si CMOS器件 SiGe virtual substrate strain Si CMOS apparatus TN432
其他题名Strained Si Substrate Technology for Nano-Meter CMOS Circuit Application
中文摘要应变硅衬底材料——弛豫SiGe层作为应变硅技术应用的基础,其质量的好坏对应变硅器件性能有致命的影响。综述了近年来用于纳米CMOS电路的各类弛豫SiGe层的制备技术,并对弛豫SiGe层中应变测量技术进行了简单的介绍,以期推动应变硅技术在我国芯片业的应用。; Fabrication of strained Si epilayer requires strain-relaxed SiGe buffer layers to serve as virtual substrates.The quality of strain-relaxed SiGe buffer layers has lethal influence on the performance of high-speed strained Si devices.Traditional and up-date methods for the nano-meter CMOS fabrication of high-quality strain-relaxed SiGe virtual substrate were reviewed.Meantime,how to determine the strain stored in SiGe virtual substrate layers was discussed.Expecting this know-how will provide valuable help for reader.
语种中文 ; 中文
内容类型期刊论文
源URL[http://hdl.handle.net/123456789/56787]  
专题清华大学
推荐引用方式
GB/T 7714
陈长春,刘江锋,余本海,等. 纳米CMOS电路的应变Si衬底制备技术[J],2010, 2010.
APA 陈长春.,刘江锋.,余本海.,戴启润.,刘志弘.,...&LIU Zhi-hong.(2010).纳米CMOS电路的应变Si衬底制备技术..
MLA 陈长春,et al."纳米CMOS电路的应变Si衬底制备技术".(2010).
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