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	CMOS implementation of RF PLL frequency synthesizer
	Chi Bao-yong ; Shi Bing-xue ; Wang Zhi-hua
	2010-05-07 ; 2010-05-07
关键词	Theoretical or Mathematical Practical/ CMOS integrated circuits frequency synthesizers phase locked loops power control prescalers voltage-controlled oscillators/ integrated RF PLL frequency synthesizer phase locked loops VCO voltage-controlled oscillators dual-modulus prescaler PFD charge-pump digital counters control logic series interface base-band processor power control CMOS process 0.25 micron 1.82 to 1.96 GHz 2.7 V/ B1250 Modulators, demodulators, discriminators and mixers B1230 Signal generators B1230B Oscillators B2570D CMOS integrated circuits/ size 2.5E-07 m frequency 1.82E+09 to 1.96E+09 Hz voltage 2.7E+00 V
中文摘要	An integrated RF PLL frequency synthesizer is presented. It integrates VCO, dual-modulus prescaler, PFD, charge-pump, various digital counters, control logic and the series interface with the base-band processor into a single chip. Also the selection of internal VCO or external VCO and power control are implemented to adapt to various applications. The frequency synthesizer has been implemented in 0.25 mu m CMOS process. The measured results show that the locked range is 1.82 GHz-1.96 GHz when the internal VCO is selected, the, phase noise could reach -119.25 dB/sub c//Hz at 25 MHz onset from the carrier 1.924 GHz. The analog part uses a 2.7 V power supply and the consumed current is about 48 mA.
语种	中文 ; 中文
出版者	Chinese Inst. Electron ; China
内容类型	期刊论文
源URL	[http://hdl.handle.net/123456789/16634]
专题	清华大学
推荐引用方式 GB/T 7714	Chi Bao-yong,Shi Bing-xue,Wang Zhi-hua. CMOS implementation of RF PLL frequency synthesizer[J],2010, 2010.
APA	Chi Bao-yong,Shi Bing-xue,&Wang Zhi-hua.(2010).CMOS implementation of RF PLL frequency synthesizer..
MLA	Chi Bao-yong,et al."CMOS implementation of RF PLL frequency synthesizer".(2010).

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