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	ASIC design of DVB transport stream receiving chip
	He Guanghui ; Yu Wei ; Zhao Xingbo ; Zhou Zucheng
	2010-05-06 ; 2010-05-06
关键词	Practical/ application specific integrated circuits CMOS integrated circuits digital signal processing chips digital video broadcasting file organisation peripheral interfaces video streaming/ application specific integrated circuit ASIC design DVB transport stream receiving chip digital video broadcasting PCI interface hardware-software partitioning strategy direct memory access DMA CMOS process 0.35 micron/ B6420 Radio and television broadcasting B1265F Microprocessors and microcomputers B2570D CMOS integrated circuits B6135 Optical, image and video signal processing C5135 Digital signal processing chips C5610P Peripheral interfaces/ size 3.5E-07 m
中文摘要	In order to receive digital video broadcasting (DVB) program with computer, this paper presents an application specific integrated circuits (ASIC) design of DVB transport stream receiving chip based on PCI interface. Hardware-software partitioning strategy is based on real-time requirement and complexity profiles of DVB system. Data path architecture is focused on the design of high-speed channel to improve the bandwidth. Furthermore, the parameters of chaining mode direct memory access (DMA) and the depth of buffer are optimized by theory analysis. The result indicates the bandwidth of chaining mode DMA is up to 476.6 Mb/s, which is 25 times as much as original DMA strategy. The chip can enhance the ability of receiving data and has been fabricated in 0.35 mu m CMOS process of Fujitsu.
语种	中文 ; 中文
出版者	Tsinghua Univ. Press ; China
内容类型	期刊论文
源URL	[http://hdl.handle.net/123456789/11684]
专题	清华大学
推荐引用方式 GB/T 7714	He Guanghui,Yu Wei,Zhao Xingbo,et al. ASIC design of DVB transport stream receiving chip[J],2010, 2010.
APA	He Guanghui,Yu Wei,Zhao Xingbo,&Zhou Zucheng.(2010).ASIC design of DVB transport stream receiving chip..
MLA	He Guanghui,et al."ASIC design of DVB transport stream receiving chip".(2010).

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