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	Efficient quantization algorithm for low-density parity-check code decoding
	Pei Yukui ; Yin Liuguo ; Lu Jianhua
	2010-05-06 ; 2010-05-06
关键词	Theoretical or Mathematical/ decoding parity check codes quantisation (signal)/ quantization algorithm low density parity check code decoding variable step uniform quantization sum-product algorithm hardware complexity check nodes bit nodes quantization step field programmable gate array/ B7220 Signal processing and conditioning equipment and techniques B6120B Codes C1260S Signal processing theory
中文摘要	A variable step uniform quantization (VSUQ) sum-product algorithm (SPA) was developed to reduce the hardware complexity of low-density parity-check (LDPC) code decoding. The extrinsic information in the check nodes and bit nodes is quantized in the same quantization step. Then, the quantization steps for the check nodes and bit nodes are multiplied and divided by a predetermined parameter. Simulation and implementation using a field programmable gate array (FPGA) show that the performance degradation in the algorithm is within 0.1 dB comparing to the unquantized standard SPA, while reducing the hardware size by 50% comparing to a uniform quantization SPA with the same performance.
语种	中文 ; 中文
出版者	Tsinghua University Press ; China
内容类型	期刊论文
源URL	[http://hdl.handle.net/123456789/10742]
专题	清华大学
推荐引用方式 GB/T 7714	Pei Yukui,Yin Liuguo,Lu Jianhua. Efficient quantization algorithm for low-density parity-check code decoding[J],2010, 2010.
APA	Pei Yukui,Yin Liuguo,&Lu Jianhua.(2010).Efficient quantization algorithm for low-density parity-check code decoding..
MLA	Pei Yukui,et al."Efficient quantization algorithm for low-density parity-check code decoding".(2010).

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