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	Testing of tree adder based on cell fault model
	Li Zhao-Lin ; Sheng Shi-Min ; Ji Li-Jiu ; Wang Yang-Yuan
	2010-05-06 ; 2010-05-06
关键词	Practical Experimental/ adders automatic test pattern generation built-in self test circuit testing fault diagnosis/ cell fault model test pattern generation tree adder self test BIST built-in self test/ B1265A Digital circuit design, modelling and testing B1265B Logic circuits C5210 Logic design methods C5120 Logic and switching circuits
中文摘要	Based on cell fault model, we study test pattern generation and self test of tree adder, which is frequently used in the high performance processors. Firstly, we analyze the tree adder's principle and conclude its properties. Secondly, based on the introduction of cell fault model, which is fit for the testing of regular circuits, we present a complete solution to tree adder testing. In conclusion, 5n-1 test patterns are enough to exhaustively test all detectable cell faults and any modification of tree adder is not required. Experiment results show that these patterns can guarantee that all cell faults are tested. These patterns have high regularity and can be effectively produced onchip as required for BIST. Furthermore, a kind of test structure suited for BIST is presented here. When testing, only 7 seed patterns are memorized and all other test patterns can be realized by loop shifting.
语种	中文 ; 中文
出版者	Science Press ; China
内容类型	期刊论文
源URL	[http://hdl.handle.net/123456789/10159]
专题	清华大学
推荐引用方式 GB/T 7714	Li Zhao-Lin,Sheng Shi-Min,Ji Li-Jiu,et al. Testing of tree adder based on cell fault model[J],2010, 2010.
APA	Li Zhao-Lin,Sheng Shi-Min,Ji Li-Jiu,&Wang Yang-Yuan.(2010).Testing of tree adder based on cell fault model..
MLA	Li Zhao-Lin,et al."Testing of tree adder based on cell fault model".(2010).

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