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	Optimization of software data prefetching in the IA-64 architecture
	Li Wenlong ; Lin Juanmin ; Tang Zhizhong
	2010-05-06 ; 2010-05-06
关键词	Practical/ benchmark testing merging optimisation pipeline processing program compilers software reliability storage management/ optimization software data prefetching IA-64 architecture explicit parallel instruction computing software pipelining merging prefetch merging prefetch using the rotating register open research compiler/ C6110B Software engineering techniques C6130 Data handling techniques C5220P Parallel architecture C6150C Compilers, interpreters and other processors C6120 File organisation C1180 Optimisation techniques
中文摘要	Software data prefetching is an effective technique for hiding memory latency. IA-64 is a new EPIC (explicit parallel instruction computing) architecture that provides hardware support for software data prefetching and software pipelining. However, the overhead introduced by the software data prefetching may sometimes result in performance degradation. An algorithm called merging prefetch using the rotating register (MPURR), which exploits the availability of rotating register in the IA-64 architecture, was developed to minimize the redundant prefetches. The algorithm is implemented in the open research compiler (ORC) and tested using several SPEC CFP2000 benchmarks. The test results show that the algorithm effectively improves the program performance and reduces the software data prefetching overhead.
语种	英语 ; 英语
出版者	Tsinghua Univ. Press ; China
内容类型	期刊论文
源URL	[http://hdl.handle.net/123456789/9742]
专题	清华大学
推荐引用方式 GB/T 7714	Li Wenlong,Lin Juanmin,Tang Zhizhong. Optimization of software data prefetching in the IA-64 architecture[J],2010, 2010.
APA	Li Wenlong,Lin Juanmin,&Tang Zhizhong.(2010).Optimization of software data prefetching in the IA-64 architecture..
MLA	Li Wenlong,et al."Optimization of software data prefetching in the IA-64 architecture".(2010).

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