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	ATPG for digital circuits with memory chips
	Cheng Ben-mao ; Yang Shi-yuan ; Wang Hong ; Ju Yan-qiu
	2010-05-06 ; 2010-05-06
关键词	Practical Theoretical or Mathematical/ circuit testing digital circuits random-access storage read-only storage/ ATPG digital circuits memory chips ROM chip RAM chip digital automatic test pattern generation systems combinational model sequential model/ B1265D Memory circuits B1265A Digital circuit design, modelling and testing C5320 Digital storage
中文摘要	Two new structural models of ROM and RAM for testing are given, which can be used as testing primitives in the digital automatic test pattern generation (ATPG) systems. Test patterns for circuits with ROM chips are generated automatically after ROM's converting to a combinational model, while the ATPG problems for circuits with RAM chips are also resolved after RAM is equivalent to a sequential model.
语种	中文 ; 中文
出版者	Editorial Board of Computer Engineering ; China
内容类型	期刊论文
源URL	[http://hdl.handle.net/123456789/9350]
专题	清华大学
推荐引用方式 GB/T 7714	Cheng Ben-mao,Yang Shi-yuan,Wang Hong,et al. ATPG for digital circuits with memory chips[J],2010, 2010.
APA	Cheng Ben-mao,Yang Shi-yuan,Wang Hong,&Ju Yan-qiu.(2010).ATPG for digital circuits with memory chips..
MLA	Cheng Ben-mao,et al."ATPG for digital circuits with memory chips".(2010).

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